IP Library Granted Patent US 11,985,219
Granted Patent B2
US 11,985,219 · App. 17/811,009 · Granted May 14, 2024

Digital communications bus suitable for automotive applications

Inventors: Jean-Paul Anna Joseph Eggermont (Pellaines, BE); Johannes Vorenholt (Leek, NL); Peter Hus (Spi{hacek over (s)}ská Nová Ves, SK)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04L7/0016H04L2012/40215H04L2012/40273
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Quick Facts
Patent No.
US 11,985,219
App. No.
17/811,009
Granted
May 14, 2024
Kind
B2
Abstract

Provided herein is a digital communications bus suitable for automotive applications, along with bus controllers and sensors that use the bus and its associated communication methods. One illustrative sensor includes: a clock signal generator; a bus interface coupled to differential signal conductors to detect periodic synchronization pulses from a bus controller; and a controller that aligns a clock signal from the clock signal generator with the periodic synchronization pulses. The bus interface sends digital data between the periodic synchronization pulses to the bus controller using the clock signal to control symbol transitions.

Claims (31)

1. A sensor that comprises:

a clock signal generator;

a bus interface coupled to differential signal conductors and configured to detect periodic synchronization pulses from a bus controller, each pulse of the periodic synchronization pulses initiating an interval for transmission of a data frame to the bus controller without further data transmission from the bus controller; and

a controller configured to align a clock signal from the clock signal generator with the periodic synchronization pulses,

the bus interface configured to send the data frames between the periodic synchronization pulses to the bus controller and to use the clock signal to control symbol transitions.

2. The sensor of claim 1 , wherein as part of said aligning, the controller is configured to adjust a period of the clock signal to match 1/N of a period of the synchronization pulses, N being an integer.

3. The sensor of claim 1 , wherein the controller is configured to use only leading edges of the synchronization pulses to determine a period of the clock signal.

4. The sensor of claim 3 , wherein the controller is configured to use only trailing edges of the synchronization pulses to set a phase of the clock signal.

5. The sensor of claim 1 , wherein as part of said aligning, the controller is configured to perform a coarse calibration phase before the bus interface begins sending the data frames.

6. The sensor of claim 5 , wherein as part of said aligning, the controller is configured to perform an adaptive tracking phase after the bus interface begins sending the data frames.

7. The sensor of claim 1 , further comprising transducer electronics configured to collect measurements independently of the clock signal, the controller being configured to use the clock signal to capture said measurements and derive the data frames therefrom.

8. A controller-area network that comprises:

a bus controller coupled to a pair of differential signal conductors and configured to transmit periodic synchronization pulses, each of the periodic synchronization pulses initiating an interval for transmission of a data frame to the bus controller without further data transmission from the bus controller;

a sensor coupled to the pair of differential signal conductors and configured to receive the periodic synchronization pulses, the sensor including:

a controller configured to align a clock signal with the periodic synchronization pulses; and

a bus interface configured to send the data frames between the periodic synchronization pulses to the bus controller and to use the clock signal to control symbol transitions.

9. The controller-area network of claim 8 , wherein as part of said aligning, the controller is configured to adjust a period of the clock signal to match 1/N of a period of the synchronization pulses, N being an integer.

10. The controller-area network of claim 8 , wherein the controller is configured to use only leading edges of the synchronization pulses to determine a period of the clock signal.

11. The controller-area network of claim 10 , wherein the controller is configured to use only trailing edges of the synchronization pulses to set a phase of the clock signal.

12. The controller-area network of claim 8 , wherein as part of said aligning, the controller is configured to perform a coarse calibration phase before the bus interface begins sending the data frames.

13. The controller-area network of claim 12 , wherein as part of said aligning, the controller is configured to perform an adaptive tracking phase after the bus interface begins sending the data frames.

14. The controller-area network of claim 8 , wherein the sensor further includes transducer electronics configured to collect measurements independently of the clock signal, the controller being configured to use the clock signal to capture said measurements and derive the data frames therefrom.

15. A digital communication method that comprises:

generating a local clock signal;

aligning the local clock signal with periodic synchronization pulses from a bus controller, each of the periodic synchronization pulses initiating an interval for transmission of a data frame to the bus controller without further data transmission from the bus controller; and

sending the data frames between the periodic synchronization pulses to the bus controller and using the clock signal to control symbol transitions.

16. The method of claim 15 , wherein said aligning includes deriving a period of the clock signal from only leading edges of the periodic synchronization pulses.

17. The method of claim 16 , wherein said aligning further includes setting a phase of the clock signal based on only trailing edges of the periodic synchronization pulses.

18. The method of claim 15 , further comprising: using the clock signal to capture independently-acquired measurements from which the data frames are derived.

19. The method of claim 18 , wherein the captured measurements include timestamp information.

20. The method of claim 15 , wherein said aligning includes performing a coarse calibration phase before sending the data frames and performing an adaptive tracking phase after a bus interface begins sending the data frames.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 061879, FRAME 0655 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064123/0001 →
SECURITY INTEREST Recorded Nov 3, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061879/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2022
From: EGGERMONT, JEAN-PAUL ANNA JOSEPH; VORENHOLT, JOHANNES; HUS, PETER
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 060415/0522 →