IP Library › Granted Patent US 12,131,891
Granted Patent B2
US 12,131,891 · App. 17/813,643 · Granted Oct 29, 2024

Wafer placement table

Inventors: Seiya Inoue (Handa, JP); Tatsuya Kuno (Nagoya, JP)
Assignee: NGK INSULATORS, LTD.
H01J37/32724H01L21/6833H01J2237/002H01J2237/2007H01J2237/327
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Quick Facts
Patent No.
US 12,131,891
App. No.
17/813,643
Granted
Oct 29, 2024
Kind
B2
Abstract

A wafer placement table includes a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode, a cooling base bonded to a bottom surface of the ceramic base and having a refrigerant flow channel, a plurality of holes extending through the cooling base in an up and down direction, and a heat exchange promoting portion that is provided in an area around at least one of the plurality of holes and that promotes heat exchange between refrigerant flowing through the refrigerant flow channel and a wafer placed on the wafer placement surface.

Claims (18)

1. A wafer placement table comprising:

a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode;

a cooling base bonded to a bottom surface of the ceramic base and having a refrigerant flow channel;

a plurality of holes extending through the cooling base in an up and down direction;

a heat exchange promoting portion that is provided in an area around at least one of the plurality of holes and that promotes heat exchange between refrigerant flowing through the refrigerant flow channel and a wafer placed on the wafer placement surface; and

a plurality of small projections that is provided on a reference surface of the wafer placement surface and that supports a bottom surface of a wafer with top faces, wherein

the top faces of the plurality of small projections are in the same plane, and

the reference surface in the heat exchange promoting portion is raised as compared to the area outside the area around at least one of the plurality of holes.

2. The wafer placement table according to claim 1 , wherein

the refrigerant flow channel in the heat exchange promoting portion is narrower than the refrigerant flow channel in an area outside the area around at least one of the plurality of holes.

3. The wafer placement table according to claim 2 , wherein

when the refrigerant flow channel is viewed in plan, the width of the refrigerant flow channel in the heat exchange promoting portion is narrower than the width of the refrigerant flow channel in the area outside the area around at least one of the plurality of holes.

4. The wafer placement table according to claim 1 , wherein

in the heat exchange promoting portion, a fin is provided on an inner surface of the refrigerant flow channel.

5. The wafer placement table according to claim 1 , wherein

a distance from the wafer to a ceiling surface of the refrigerant flow channel in the heat exchange promoting portion is shorter than the distance in an area outside the area around at least one of the plurality of holes.

6. The wafer placement table according to claim 1 , wherein

at least one of the plurality of holes is at least one selected from the group of a power supply member insertion hole that is provided to extend downward from the electrode in the wafer placement table and through which a power supply member that supplies electric power to the electrode is inserted, a lift pin hole that extends through the wafer placement table in the up and down direction and through which a lift pin is inserted, and a gas hole that extends through the wafer placement table in the up and down direction and through which gas is supplied to the wafer placement surface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2022
From: INOUE, SEIYA; KUNO, TATSUYA
To: NGK INSULATORS, LTD.
Reel/Frame 060561/0802 →
Priority Claims (1)
JP 2021-168603 · Oct 14, 2021 · national
Continuity (1)
Related Publication 20230122013A1 · Apr 20, 2023