IP Library Granted Patent US 11,876,954
Granted Patent B2
US 11,876,954 · App. 17/816,224 · Granted Jan 16, 2024

Stitched integrated circuit dies

Inventors: Nicholas Paul Cowley (Wroughton, GB); Andrew David Talbot (Chieveley, GB)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N17/002H04N25/771H04N25/79H01L27/14603
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Quick Facts
Patent No.
US 11,876,954
App. No.
17/816,224
Granted
Jan 16, 2024
Kind
B2
Abstract

An image sensor may be implemented using a stitched image sensor die. The stitched image sensor die may be formed from a step and repeat exposure process using a set of tiles in a reticle set. Multiple instantiations of a same circuitry block on a given tile may be patterned and formed on the image sensor die. The image sensor die may include circuitry configured to enable testing of one or more instantiations of the same circuitry block. The image sensor die may include memory circuitry for storing indications of a functional instantiation of the multiple instances and may use the functional instantiation for normal operation.

Claims (34)

1. An image sensor die comprising:

a plurality of circuitry block instantiations based on a circuitry block, any circuitry block instantiation in the plurality of circuitry block instantiations being configurable to be communicatively coupled to a circuit feature associated with the circuitry block; and

multiplexer circuitry that is between each circuitry block instantiation of the plurality of circuitry block instantiations and the circuit feature and that connects a given circuitry block instantiation of the plurality of circuitry block instantiations to and disconnects each circuitry block instantiation of the plurality of circuitry block instantiations other than the given circuitry block instantiation from the circuit feature based on a stored indication that the given circuitry block instantiation is functional.

2. The image sensor die defined in claim 1 , wherein each circuitry block instantiation in the plurality of circuitry block instantiations is coupled to the multiplexer circuitry via a respective path.

3. The image sensor die defined in claim 2 , wherein the multiplexer circuitry is coupled to the circuit feature via an additional path, and the respective path of the given circuitry block instantiation is connected to the additional path.

4. The image sensor die defined in claim 1 , wherein the given circuitry block instantiation is in an enabled state, and each circuitry block instantiation in the plurality of circuitry block instantiations other than the given circuitry block instantiation is in a disabled state.

5. The image sensor die defined in claim 1 further comprising:

on-die programmable memory configured to store the indication that the given circuitry block instantiation is functional.

6. The image sensor die defined in claim 1 further comprising:

a plurality of stitched portions, each portion being formed based on a tile in a reticle set.

7. The image sensor die defined in claim 6 , wherein the tile is a pixel tile, and each portion in the plurality of stitched portions forms a respective portion of an image sensor pixel array.

8. The image sensor die defined in claim 6 , further comprising:

an additional plurality of stitched portions, each portion being formed based on a peripheral tile in the reticle set and comprising respective non-pixel circuitry.

9. An image sensor die comprising:

a plurality of instantiations for a same circuitry block;

a circuit feature that is controllable by the circuitry block;

multiplexer circuitry coupled between the circuit feature and the plurality of instantiations, wherein the multiplexer circuitry is configured to pass a signal from a given instantiation in the plurality of instantiations to the circuit feature;

control and selection circuitry coupled to each instantiation in the plurality of instantiations and the multiplexer circuitry; and

memory circuitry coupled to the control and selection circuitry and configured to store an indication of at least one instantiation in the plurality of instantiations, the at least one instantiation including the given instantiation.

10. The image sensor die defined in claim 9 , wherein the indication is indictive of a functional instantiation in the plurality of instantiations, the given instantiation is the functional instantiation, and the multiplexer circuitry is configured to connect the functional instantiation to the circuit feature based on the stored indication.

11. The image sensor die defined in claim 10 , wherein the functional instantiation is in an enabled state, and each instantiation in the plurality of instantiations other than the functional instantiation is in a disabled state.

12. The image sensor die defined in claim 9 , wherein the control and selection circuitry is configured to receive a test signal from test circuitry to test at least one instantiation of the plurality of instantiations.

13. The image sensor die defined in claim 12 , wherein the multiplexer circuitry is configured to connect the at least one instantiation being tested to the test circuitry.

14. The image sensor die defined in claim 13 , wherein the memory circuitry is configured to store an indication of the at least one tested instantiation, if functional, as the indication of at least one instantiation in the plurality of instantiations.

15. The image sensor die defined in claim 14 , wherein the indication of the at least one tested instantiation comprises location information of the at least one tested instantiation.

16. A stitched integrated circuit die comprising:

a plurality of circuitry block instantiations of a same circuitry block, wherein any of the plurality of circuitry block instantiations is configurable to be communicatively coupled to a circuit;

memory circuitry configured to store information indicative of a functional circuitry block instantiation in the plurality of circuitry block instantiations; and

control circuitry configured to provide a connection between the functional circuitry block instantiation and the circuit based on the stored information, wherein the control circuitry is configured to enable the functional circuitry block instantiation and disable any circuitry block instantiation in the plurality of circuitry block instantiations other than the functional circuitry block instantiation.

17. The stitched integrated circuit die defined in claim 16 further comprising:

an array of image sensor pixels, wherein non-pixel circuitry is formed along a periphery of the array of image sensor pixels.

18. The stitched integrated circuit die defined in claim 17 , wherein the non-pixel circuitry includes the plurality of circuitry block instantiations.

19. The stitched integrated circuit die defined in claim 17 , wherein the array of image sensor pixels and the non-pixel circuitry are formed from repeated instantiations of tiles in a reticle set.

20. The image sensor die defined in claim 9 , wherein the multiplexer circuitry is configured to receive a corresponding signal from each of the plurality of instantiations and is configured to pass the signal from the given instantiation to the circuit feature without passing any of the corresponding signals other the signal from the given instantiation to the circuit feature.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 061879, FRAME 0655 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064123/0001 →
SECURITY INTEREST Recorded Nov 3, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061879/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2022
From: COWLEY, NICHOLAS PAUL; TALBOT, ANDREW DAVID
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 060675/0553 →