IP Library Granted Patent US 11,722,802
Granted Patent B2
US 11,722,802 · App. 17/818,436 · Granted Aug 8, 2023

Imaging systems with adjustable amplifier circuitry

Inventors: Rajashekar Benjaram (Banaglore, IN); Gurvinder Singh (Bangalore, IN)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N25/75H01L27/14612H04N25/50H04N25/709H04N25/77H04N25/778
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Quick Facts
Patent No.
US 11,722,802
App. No.
17/818,436
Granted
Aug 8, 2023
Kind
B2
Abstract

An image sensor may include an array of image pixels. The array of image pixel may be coupled to column readout circuitry. A given image pixel may generate a low light signal and a high light signal for a given exposure. A column line may couple the given image pixel to readout circuitry having amplifier circuitry. The column line may be coupled to an autozeroing transistor for reading out the high light signal and a source follower stage for readout out the low light signal. The amplifier circuitry may receive different common mode voltage depending on whether it is amplifying the low or high light signal. The gain and other operating parameters of the amplifier circuitry may be adjusted based on whether it is amplifying the low or high signal. If desired, separate amplifier circuitry may be implemented for the low and high light signals.

Claims (40)

1. An image sensor comprising:

an image sensor pixel array having an image sensor pixel;

an amplifier having a first input terminal coupled to the image sensor pixel via a pixel readout path and having a second input terminal;

a first reference voltage terminal providing a first reference voltage to the second input terminal via a given node of the second input terminal;

a second reference voltage terminal providing a second reference voltage to the second input terminal via the given node of the second input terminal;

a first transistor coupled to the pixel readout path; and

a second transistor coupled to the pixel readout path.

2. The image sensor defined in claim 1 further comprising:

a third reference voltage terminal providing a third reference voltage, wherein the first transistor couples the pixel readout path to the third reference voltage terminal.

3. The image sensor defined in claim 2 , wherein the third reference voltage is a ground voltage.

4. The image sensor defined in claim 3 , wherein the first and second reference voltages are each different than the ground voltage.

5. The image sensor defined in claim 1 further comprising:

a third transistor coupled in series with the second transistor.

6. The image sensor defined in claim 1 further comprising:

a first switch coupling the second input terminal to the first reference voltage terminal; and

a second switch coupling the second input terminal to the second reference voltage terminal.

7. The image sensor defined in claim 1 further comprising:

an input capacitor coupled along the pixel readout path.

8. The image sensor defined in claim 7 , wherein the input capacitor has a first terminal coupled to the first input terminal of the amplifier and has a second terminal coupled to the first transistor and to the second transistor.

9. The image sensor defined in claim 7 , wherein the amplifier has an output terminal coupled to the first input terminal of the amplifier by a feedback capacitor.

10. The image sensor defined in claim 9 , wherein the output terminal of the amplifier is coupled to an additional capacitor via a switch.

11. The image sensor defined in claim 9 , wherein the amplifier has an output terminal coupled to the first input terminal of the amplifier by a switch.

12. The image sensor defined in claim 9 further comprising:

sampling circuitry; and

a sampling switch coupling the output terminal of the amplifier circuitry to the sampling circuitry.

13. The image sensor defined in claim 1 further comprising:

a first switch coupling the second input terminal to the first reference voltage terminal, wherein the amplifier has an output terminal is coupled to a capacitor via an additional switch and the first switch and the additional switch are controlled by a same control signal.

14. The image sensor defined in claim 1 , wherein the image sensor pixel array is arranged in a plurality of columns, a given column in the plurality of columns containing the image sensor pixel and additional image sensor pixels, and the amplifier is disposed within column readout circuitry coupled to the given column in the image sensor pixel array.

15. An image sensor comprising:

image pixels arranged in columns and rows; and

column readout circuitry having an amplifier, wherein a given column of image pixels is coupled to a first input terminal of the amplifier via a column line, wherein a second input terminal of the amplifier is coupled to a first reference voltage terminal by a first switch and is coupled to a second reference voltage terminal by a second switch, and wherein the first and second reference voltage terminals are coupled to a same node of the second input terminal by the first and second switches, respectively.

16. The image sensor defined in claim 15 , wherein the second input terminal of the amplifier is configured to receive a first reference voltage from the first reference voltage terminal to perform a readout operation for a first image signal from a given image pixel in the given column.

17. The image sensor defined in claim 16 , wherein the second input terminal of the amplifier is configured to receive a second reference voltage from the second reference voltage terminal to perform a readout operation for a second image signal from the given image pixel.

18. The image sensor defined in claim 17 , wherein the column readout circuitry includes a transistor coupled to the column line and through which a bias current is provided, and wherein the transistor is configured to be activated for the readout operation for the first image signal and deactivated for the readout operation for the second image signal.

19. Pixel readout circuitry for an image sensor, the pixel readout circuitry comprising:

a first amplifier having a first input terminal configured to be coupled to an image sensor pixel via a first switch and having a second input terminal configured to receive a first reference voltage; and

a second amplifier having a first input terminal configured to be coupled to the image sensor pixel via a second switch and having a second input terminal configured to receive a second reference voltage greater than the first reference voltage.

20. The pixel readout circuitry defined in claim 19 further comprising:

a first transistor configured to couple the image sensor pixel to a reference voltage terminal; and

a second transistor configured to couple the image sensor pixel to a bias current source.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 061879, FRAME 0655 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064123/0001 →
SECURITY INTEREST Recorded Nov 3, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061879/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2022
From: BENJARAM, RAJASHEKAR; SINGH, GURVINDER
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 060756/0317 →