IP Library › Granted Patent US 11,894,260
Granted Patent B2
US 11,894,260 · App. 17/818,601 · Granted Feb 6, 2024

Replacement material for backside gate cut feature

Inventors: Wang-Chun Huang (Hsinchu, TW); Yu-Xuan Huang (Hsinchu, TW); Hou-Yu Chen (Hsinchu, TW); Kuan-Lun Cheng (Hsinchu, TW); Chih-Hao Wang (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
H01L21/76224H01L21/764H01L21/823437H01L21/823481H01L27/0886
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Quick Facts
Patent No.
US 11,894,260
App. No.
17/818,601
Granted
Feb 6, 2024
Kind
B2
Abstract

A semiconductor structure includes a gate structure surrounding a plurality of channels and a cut feature that electrically isolates two separate portions of the gate structure. The cut feature comprises an outer layer having a work-function metal, and an inner layer comprising a dielectric material. The cut feature extends above a top surface of the gate structure.

Claims (39)

1. A semiconductor structure comprising:

a substrate;

a gate structure over the substrate; and

a cut feature between two separate portions of the gate structure and in direct contact with both the two separate portions of the gate structure,

wherein the cut feature comprises a dielectric layer and a work-function layer between the dielectric layer and the two separate portions of the gate structure, and

wherein the work-function layer directly contacts the dielectric layer and is spaced apart from a channel region surrounded by the gate structure.

2. The semiconductor structure of claim 1 , wherein a top surface of the work-function layer is coplanar or above a topmost surface of the gate structure, and wherein a bottom surface of the work-function layer is coplanar or below a bottommost surface of the gate structure.

3. The semiconductor structure of claim 1 , further comprising an upper dielectric layer directly contacting a top surface of the gate structure, wherein a top portion of the cut feature extends into the upper dielectric layer.

4. The semiconductor structure of claim 1 , wherein the channel region comprises a plurality of channel layers interleaved with the gate structure.

5. The semiconductor structure of claim 1 , wherein the substrate comprises a fin structure, and wherein a width of the cut feature is equal to or smaller than a width of the fin structure.

6. The semiconductor structure of claim 1 , wherein the cut feature further comprises an oxide cap directly contacting a top surface of the dielectric layer and a top surface of the work-function layer.

7. The semiconductor structure of claim 6 , wherein a thickness of the oxide cap is about equal to a width of the work-function layer.

8. The semiconductor structure of claim 1 , wherein the dielectric layer is a first dielectric layer, wherein the work-function layer extends along an upper portion of sidewalls of the first dielectric layer, and wherein the cut feature further comprises a second dielectric layer extending along a lower portion of the sidewalls of the first dielectric layer.

9. The semiconductor structure of claim 8 , wherein the second dielectric layer comprises a same material as a dielectric material in the first dielectric layer.

10. The semiconductor structure of claim 1 , wherein an upper portion of sidewalls of the dielectric layer is lined by the work-function layer, and wherein a lower portion of the sidewalls of the dielectric layer is exposed to air.

11. The semiconductor structure of claim 1 , wherein the substrate comprises two adjacent fin structures, and wherein the dielectric layer extends along a central line between the two adjacent fin structures.

12. A semiconductor structure comprising:

a first transistor comprising:

a first plurality of nanostructures over a substrate, and

a first gate structure wrapping around the first plurality of nanostructures;

a second transistor comprising:

a second plurality of nanostructures over the substrate, and

a second gate structure wrapping around the second plurality of nanostructures;

and

an isolation structure disposed between the first transistor and the second transistor and configured to provide isolation between the first and second gate structures,

wherein the isolation structure comprises a work-function layer on sidewalls of the first and second gate structures, and a dielectric layer wrapped by the work-function layer, and

wherein the isolation structure extends into the substrate.

13. The semiconductor structure of claim 12 , further comprising an upper dielectric layer over the first and second gate structures and the isolation structure, and wherein the isolation structure further comprises an oxide cap separating the dielectric layer and the work-function layer from the upper dielectric layer.

14. The semiconductor structure of claim 13 , wherein the oxide cap is embedded in the upper dielectric layer.

15. The semiconductor structure of claim 12 , wherein the work-function layer directly contacts an entirety of the sidewalls of the first and second gate structures.

16. The semiconductor structure of claim 12 , wherein the dielectric layer comprises oxides.

17. The semiconductor structure of claim 12 , wherein the dielectric layer is a first dielectric layer, wherein the work-function layer extends along an upper portion of sidewalls of the first dielectric layer, and wherein the isolation structure further comprises a second dielectric layer extending along a lower portion of the sidewalls of the first dielectric layer.

18. A semiconductor structure comprising:

a gate structure surrounding a plurality of channel layers; and

a cut feature that electrically isolates two separate portions of the gate structure,

wherein the cut feature comprises an outer layer having a work-function metal, and an inner layer comprising a dielectric material, and

wherein the cut feature extends above a top surface of the gate structure, and wherein a bottom surface of the outer layer is below a bottommost surface of the gate structure.

19. The semiconductor structure of claim 18 , wherein a top portion of the cut feature comprises an oxide cap.

20. The semiconductor structure of claim 18 , wherein the work-function metal is a same material as a work function material in the gate structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2022
From: HUANG, WANG-CHUN; HUANG, YU-XUAN; CHEN, HOU-YU; CHENG, KUAN-LUN; WANG, CHIN-HAO
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
Reel/Frame 061708/0486 →
Continuity (2)
Division 17186839 · Feb 26, 2021
Related Publication 20220384250A1 · Dec 1, 2022