Pixel and display device including the same
A pixel includes an emission area and a non-emission area; first to fourth alignment electrodes spaced apart from each other in the emission area and an area of the non-emission area; an insulating layer disposed on the first to fourth alignment electrodes; first to fourth bridge patterns disposed on the insulating layer in the non-emission area; a bank disposed on the first to fourth bridge patterns in the non-emission area, and including a first opening and a second opening; first and second pixel electrodes disposed in the emission area; and light emitting elements disposed in the emission area, and electrically connected with the first and second pixel electrodes. The first alignment electrode, the first bridge pattern, and the first pixel electrode are electrically connected to each other. The third alignment electrode, the third bridge pattern, and the second pixel electrode are electrically connected to each other.
1. A pixel comprising:
an emission area and a non-emission area;
a first alignment electrode, a second alignment electrode, a third alignment electrode, and a fourth alignment electrode spaced apart from each other in the emission area and an area of the non-emission area;
an insulating layer disposed on the first to the fourth alignment electrodes;
a first bridge pattern, a second bridge pattern, a third bridge pattern, and a fourth bridge pattern disposed on the insulating layer in the non-emission area, and spaced apart from each other;
a bank disposed on the first to the fourth bridge patterns in the non-emission area, and including:
a first opening corresponding to the emission area; and
a second opening spaced apart from the first opening;
a first pixel electrode and a second pixel electrode disposed in the emission area, and spaced apart from each other; and
light emitting elements disposed in the emission area, and electrically connected with the first and the second pixel electrodes, wherein
the first alignment electrode, the first bridge pattern, and the first pixel electrode are electrically connected to each other, and
the third alignment electrode, the third bridge pattern, and the second pixel electrode are electrically connected to each other.
2. The pixel according to claim 1 , wherein the insulating layer includes:
at least one first contact hole exposing a portion of the first alignment electrode;
at least one second contact hole exposing a portion of the second alignment electrode;
at least one third contact hole exposing a portion of the third alignment electrode; and
at least one fourth contact hole exposing a portion of the fourth alignment electrode.
3. The pixel according to claim 2 , wherein
the first bridge pattern is electrically connected with the first alignment electrode through the first contact hole,
the second bridge pattern is electrically connected with the second alignment electrode through the second contact hole,
the third bridge pattern is electrically connected with the third alignment electrode through the third contact hole, and
the fourth bridge pattern is electrically connected with the fourth alignment electrode through the fourth contact hole.
4. The pixel according to claim 3 , wherein the first, the second, the third, and the fourth contact holes are disposed in the non-emission area.
5. The pixel according to claim 4 , wherein the first, the second, the third, and the fourth contact holes overlaps the bank in a plan view.
6. The pixel according to claim 4 , wherein the first to the fourth alignment electrodes and the first to the fourth bridge patterns include different materials.
7. The pixel according to claim 6 , wherein
the first to the fourth alignment electrodes include an opaque conductive material, and
the first to the fourth bridge patterns include a transparent conductive oxide.
8. The pixel according to claim 4 , wherein
the first pixel electrode is disposed directly on the first bridge pattern in the second opening and electrically connected with the first bridge pattern, and
the second pixel electrode is disposed directly on the third bridge pattern in the second opening and electrically connected with the third bridge pattern.
9. The pixel according to claim 8 , wherein
the first pixel electrode is disposed on the first alignment electrode in the first opening with the insulating layer disposed between the first pixel electrode and the first alignment electrode, and
the second pixel electrode is disposed on the third alignment electrode in the first opening with the insulating layer disposed between the second pixel electrode and the third alignment electrode.
10. The pixel according to claim 8 , further comprising:
a substrate;
at least one transistor disposed on the substrate;
at least one power line disposed on the substrate and supplied with a power voltage;
a passivation layer disposed on the transistor and the power line, and including:
a first contact portion exposing a portion of the transistor, and
a second contact portion exposing a portion of the power line; and
a via layer including:
a first contact portion corresponding to the first contact portion of the passivation layer; and
a second contact portion corresponding to the second contact portion of the passivation layer.
11. The pixel according to claim 10 , wherein the insulating layer is disposed on the via layer, and includes:
a first contact portion corresponding to the first contact portion of the via layer; and
a second contact portion corresponding to the second contact portion of the via layer.
12. The pixel according to claim 11 , wherein the first contact portion and the second contact portion are disposed in the non-emission area and overlap the bank in a plan view.
13. The pixel according to claim 11 , wherein
the first bridge pattern is electrically connected with the transistor through the first contact portion, and
the third bridge pattern is electrically connected with the power line through the second contact portion.
14. The pixel according to claim 7 , further comprising:
a color conversion layer disposed over the light emitting elements, and converting a first color of light emitted from the light emitting elements to a second color of light; and
a color filter disposed over the color conversion layer and allowing the second color of light to selectively pass therethrough.
15. The pixel according to claim 7 , further comprising:
an intermediate electrode spaced apart from the first and the second pixel electrodes.
16. A display device comprising:
a substrate including a display area and a non-display area;
pixels provided in the display area of the substrate; and
a pad disposed in the non-display area of the substrate, and electrically connected with each of the pixels, wherein
each of the pixels comprises:
an emission area and a non-emission area;
a first alignment electrode, a second alignment electrode, a third alignment electrode, and a fourth alignment electrode spaced apart from each other in the emission area and an area of the non-emission area;
an insulating layer disposed on the first to the fourth alignment electrodes;
a first bridge pattern, a second bridge pattern, a third bridge pattern, and a fourth bridge pattern disposed on the insulating layer in the non-emission area, and spaced apart from each other;
a bank disposed on the first to the fourth bridge patterns in the non-emission area, and including:
a first opening corresponding to the emission area; and
a second opening spaced apart from the first opening;
a first pixel electrode and a second pixel electrode disposed in the emission area, and spaced apart from each other; and
light emitting elements disposed in the emission area, and electrically connected with the first and the second pixel electrodes,
the first alignment electrode, the first bridge pattern, and the first pixel electrode are electrically connected to each other, and
the third alignment electrode, the third bridge pattern, and the second pixel electrode are electrically connected to each other.
17. The display device according to claim 16 , wherein
the insulating layer includes:
at least one first contact hole exposing a portion of the first alignment electrode;
at least one second contact hole exposing a portion of the second alignment electrode;
at least one third contact hole exposing a portion of the third alignment electrode; and
at least one fourth contact hole exposing a portion of the fourth alignment electrode,
the first bridge pattern is electrically connected with the first alignment electrode through the first contact hole,
the second bridge pattern is electrically connected with the second alignment electrode through the second contact hole,
the third bridge pattern is electrically connected with the third alignment electrode through the third contact hole, and
the fourth bridge pattern is electrically connected with the fourth alignment electrode through the fourth contact hole.
18. The display device according to claim 17 , wherein the first, the second, the third, and the fourth contact holes are disposed in the non-emission area, and overlap the bank in a plan view.
19. The display device according to claim 16 , wherein
the pad comprises:
a first pad electrode disposed on the substrate;
the insulating layer disposed on the first pad electrode, and including a pad electrode contact hole exposing a portion of the first pad electrode; and
a second pad electrode disposed on the insulating layer and electrically connected with the first pad electrode through the pad electrode contact hole,
the second pad electrode and the first to the fourth bridge patterns are disposed on a same layer, and
the second pad electrode and the first to the fourth bridge patterns include a same material.
20. The display device according to claim 16 , wherein
the first to the fourth alignment electrodes and the first to the fourth bridge patterns include different materials, and
the first to the fourth alignment electrodes include an opaque conductive material, and
the first to the fourth bridge patterns include a transparent conductive material.