Data writing method and apparatus, and storage medium

1. A data writing method for a NAND flash applied to a NAND controller, comprising:

for each channel of the NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs, the pairing comprising:

for each channel of the NAND flash, determining a number of the LUNs included in the LUN pair by

calculating a ratio of program cache busy time to data transmission time;

based on that the ratio is less than 1, determining that each LUN pair includes two LUNs; and

based on that the ratio is equal to M, determining that each LUN pair includes M+1 LUNs, where M is an integer greater than 1; and

pairing all the LUNs in the channel so that each LUN pair includes the determined number of the LUNs; and

for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair.

2. The data writing method of claim 1 , wherein

for each channel of the NAND flash, all the LUNs in the channel are paired so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, and a UP page, respectively;

for each word line of each LUN pair, data writing is performed in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair; and

performing data writing on the UP page of the second LUN in the LUN pair.

3. The data writing method of claim 1 , wherein

for each channel of the NAND flash, all the LUNs in the channel are paired so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, a UP page, and a TP page, respectively;

for each word line of each LUN pair, data writing is performed in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair;

performing data writing on the UP page of the second LUN in the LUN pair;

performing data writing on the TP page of the first LUN in the LUN pair; and

performing data writing on the TP page of the second LUN in the LUN pair.

4. A data writing apparatus for a NAND flash, applied to a NAND controller, comprising:

a pairing module configured to, for each channel of the NAND flash, pair-perform pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs, the pairing including, for each channel of the NAND flash, determining a number of the LUNs included in the LUN pair by

calculating a ratio of program cache busy time to data transmission time;

based on that the ratio is less than 1, determining that each LUN pair includes two LUNs; and

based on that the ratio is equal to M, determining that each LUN pair includes M+1 LUNs, where M is an integer greater than 1; and

pairing all the LUNs in the channel so that each LUN pair includes the determined number of the LUNs; and

a writing module configured to, for each LUN pair, sequentially write data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially write data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair.

5. The data writing apparatus of claim 4 , wherein

the pairing module is configured to: for each channel of the NAND flash, pair all the LUNs in the channel so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, and a UP page, respectively;

the writing module is configured to: for each word line of each LUN pair, perform data writing in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair; and

performing data writing on the UP page of the second LUN in the LUN pair.

6. The data writing apparatus of claim 4 , wherein

the pairing module is configured to: for each channel of the NAND flash, pair all the LUNs in the channel so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, a UP page, and a TP page, respectively;

the writing module is configured to: for each word line of each LUN pair, perform data writing in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair;

performing data writing on the UP page of the second LUN in the LUN pair;

performing data writing on the TP page of the first LUN in the LUN pair; and

performing data writing on the TP page of the second LUN in the LUN pair.

7. A data writing apparatus, comprising:

a processor; and

a memory for storing processor executable instructions, wherein

the processor is configured to invoke the instructions stored in the memory, so as to perform:

for each channel of a NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs, the pairing including, for each channel of the NAND flash, determining a number of the LUNs included in the LUN pair by

calculating a ratio of program cache busy time to data transmission time;

based on that the ratio is less than 1, determining that each LUN pair includes two LUNs; and

based on that the ratio is equal to M, determining that each LUN pair includes M+1 LUNs, where M is an integer greater than 1; and

pairing all the LUNs in the channel so that each LUN pair includes the determined number of the LUNs; and

for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair.

8. A non-volatile computer-readable storage medium having computer program instructions stored thereon, wherein the computer program instructions are executed by a processor, the processor is caused to perform operations of:

for each channel of a NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs, the pairing including, for each channel of the NAND flash, determining a number of the LUNs included in the LUN pair by

calculating a ratio of program cache busy time to data transmission time;

based on that the ratio is less than 1, determining that each LUN pair includes two LUNs; and

based on that the ratio is equal to M, determining that each LUN pair includes M+1 LUNs, where M is an integer greater than 1; and

pairing all the LUNs in the channel so that each LUN pair includes the determined number of the LUNs; and

for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair.

9. The data writing apparatus of claim 7 , wherein

for each channel of the NAND flash, all the LUNs in the channel are paired so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, and a UP page, respectively;

for each word line of each LUN pair, data writing is performed in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair; and

performing data writing on the UP page of the second LUN in the LUN pair.

10. The data writing apparatus of claim 7 , wherein

for each channel of the NAND flash, all the LUNs in the channel are paired so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, a UP page, and a TP page, respectively;

for each word line of each LUN pair, data writing is performed in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair;

performing data writing on the UP page of the second LUN in the LUN pair;

performing data writing on the TP page of the first LUN in the LUN pair; and

performing data writing on the TP page of the second LUN in the LUN pair.

11. The non-volatile computer-readable storage of claim 8 , wherein

for each channel of the NAND flash, all the LUNs in the channel are paired so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, and a UP page, respectively;

for each word line of each LUN pair, data writing is performed in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair; and

performing data writing on the UP page of the second LUN in the LUN pair.

12. The non-volatile computer-readable storage medium of claim 8 , wherein

for each channel of the NAND flash, all the LUNs in the channel are paired so that each LUN pair includes a first LUN and a second LUN, wherein each word line of the first LUN and the second LUN includes an LP page, an MP page, a UP page, and a TP page, respectively;

for each word line of each LUN pair, data writing is performed in a manner of:

performing data writing on the LP page of the first LUN in the LUN pair;

performing data writing on the LP page of the second LUN in the LUN pair;

performing data writing on the MP page of the first LUN in the LUN pair;

performing data writing on the MP page of the second LUN in the LUN pair;

performing data writing on the UP page of the first LUN in the LUN pair;

performing data writing on the UP page of the second LUN in the LUN pair;

performing data writing on the TP page of the first LUN in the LUN pair; and

performing data writing on the TP page of the second LUN in the LUN pair.