Seam-top seal for dielectrics
A post-deposition treatment can be applied to an atomic layer deposition (ALD)-deposited film to seal one or more seams at the surface. The seam-top treatment can physically merge the two sides of the seam, so that the surface behaves as a continuous material to allow etching at a substantially uniform rate across the surface of the film. The seam-top treatment can be used to merge seams in ALD-deposited films within semiconductor structures, such as gate-all-around field effect transistors (GAAFETs).
1. A method, comprising:
depositing, onto a semiconductor substrate, a dielectric layer having a surface structure comprising methanide (CH 3 ) radicals bonded to silicon atoms;
applying a pre-treatment to convert the CH 3 radicals to amino (NH 2 ) radicals;
applying a conversion treatment to convert the NH 2 radicals to hydroxide (OH) radicals;
applying a dehydration treatment to remove water molecules from the surface structure; and
cross-linking remaining oxygen atoms between adjacent silicon atoms.
2. The method of claim 1 , wherein depositing the dielectric layer comprises depositing a dielectric layer as an inner spacer of a gate-all-around field effect transistor (GAAFET).
3. The method of claim 1 , wherein depositing the dielectric layer comprises depositing a low-k dielectric layer.
4. The method of claim 1 , wherein depositing the dielectric layer comprises forming the dielectric layer by atomic layer deposition (ALD).
5. The method of claim 1 , wherein depositing the dielectric layer comprises conforming the dielectric layer to a topography of an underlying layer.
6. The method of claim 1 , wherein depositing the dielectric layer comprises depositing one or more of silicon oxycarbonitride, hydrogenated silicon oxycarbide, and hydrogenated silicon carbonitride.
7. The method of claim 1 , wherein cross-linking comprises applying one or more of an ultra-violet (UV) cure and a wet anneal to the silicon atoms.
8. The method of claim 1 , wherein applying the conversion and dehydration treatments comprises applying the conversion and dehydration treatments to a surface of the dielectric layer having a depth of about 1 nm to about 20 nm.
9. A method, comprising:
depositing, onto a substrate, a low-k dielectric layer using atomic layer deposition;
applying a post-deposition treatment to the low-k dielectric layer, the post-deposition treatment comprising:
converting methanide (CH 3 ) radicals at a top surface of the low-k dielectric layer to amino (NH 2 ) radicals; and
converting the NH 2 radicals to hydroxide (OH) radicals; and
annealing the treated low-k dielectric layer.
10. The method of claim 9 , further comprising:
forming fins and isolation regions on the substrate;
forming a superlattice on the fins;
forming a sacrificial polysilicon gate on the superlattice;
etching back the superlattice in source/drain regions;
forming doped epitaxial source/drain regions;
removing doped layers from the superlattice;
forming an inter-layer dielectric; and
replacing the polysilicon gate with a gate-all-around structure that includes dielectric inner spacers.
11. The method of claim 9 , wherein applying the post-deposition treatment comprises exposing the low-k dielectric layer to one or more of a nitrogen source, a hydrogen source, and an oxygen source comprising one or more of an oxygen plasma, oxygen gas, ozone, and water.
12. The method of claim 11 , wherein exposing the low-k dielectric layer to the nitrogen source comprises exposing the low-k dielectric layer to one or more of a nitrogen plasma, nitrogen gas, ammonia (NH 3 ) gas, and nitrous oxide (N 2 O) plasma.
13. The method of claim 11 , wherein exposing the low-k dielectric layer to the hydrogen source comprises exposing the low-k dielectric layer to one or more of a hydrogen plasma and hydrogen gas.
14. The method of claim 9 , wherein applying the post-deposition treatment comprises exposing the low-k dielectric layer to a microwave plasma.
15. The method of claim 9 , wherein applying the post-deposition treatment comprises applying the post-deposition treatment at temperatures within a range of about 150° C. to about 300° C.
16. The method of claim 9 , wherein applying the post-deposition treatment comprises applying the post-deposition treatment at pressures within a range of about 1 mTorr to about 2000 Torr.
17. The method of claim 9 , further comprising applying a wet etch treatment to recess the low-k dielectric layer.
18. A method, comprising:
forming a plurality of alternating first and second nanostructured layers on a substrate;
etching an edge portion of each of the first nanostructured layers to form spacer cavities;
depositing within the spacer cavities, a dielectric material having a surface comprising methanide (CH 3 ) radicals bonded to silicon atoms and amino (NH 2 ) radicals bonded to silicon atoms; and
converting the CH 3 radicals and NH 2 radicals on the dielectric material surface to hydroxide (OH) radicals.
19. The method of claim 18 , further comprising removing OH radicals bonded to silicon atoms on the dielectric material surface by a dehydration and cross-linking process.
20. The method of claim 19 , wherein the dehydration and cross-linking process comprises exposing the dielectric material to ultra-violet light.