Metal pads over TSV
Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad having a larger diameter or surface area (e.g., oversized for the application) may be used when a contact pad is positioned over a TSV in one or both substrates.
1. A method of forming a microelectronic assembly, comprising:
providing a first through substrate via (TSV) in a first substrate having a first surface;
forming a first metal contact pad in the first surface electrically coupled to and aligned over the first TSV;
forming a second metal contact pad in the first surface, the second metal contact pad having no TSV aligned thereunder, wherein the second metal contact pad has a smaller surface area at the first surface than the first metal contact pad; and
treating the first surface, the first metal contact pad and the second metal contact pad to form a first bonding surface for direct hybrid bonding.
2. The method of forming the microelectronic assembly of claim 1 , wherein treating the first surface, the first metal contact pad and the second metal contact pad to form the first bonding surface for direct hybrid bonding comprises chemical mechanical planarization.
3. The method of forming the microelectronic assembly of claim 1 , wherein treating the first surface, the first metal contact pad and the second metal contact pad to form the first bonding surface for hybrid direct bonding comprises recessing the first metal contact pad from a dielectric surface of the first bonding surface to a greater degree than recessing the second metal contact pad from the dielectric surface of the first bonding surface.
4. The method of forming the microelectronic assembly of claim 3 , wherein recessing the first metal contact pad from the dielectric surface to a greater degree than recessing the second metal contact pad from the dielectric surface comprises chemical mechanical planarization.
5. The method of forming the microelectronic assembly of claim 1 , further comprising:
exposing the first TSV from a surface opposite the first bonding surface; and
processing the surface opposite the first bonding surface to provide a second bonding surface.
6. The method of forming the microelectronic assembly of claim 1 , further comprising:
providing a second substrate having a second bonding surface including a plurality of conductive interconnects;
direct hybrid bonding the first bonding surface of the first substrate to the second bonding surface of the second substrate without intervening adhesive, including directly bonding the first metal contact pad and the second metal contact pad to corresponding conductive interconnects of the second substrate.
7. The method of forming the microelectronic assembly of claim 6 , wherein direct hybrid bonding comprising heating the first and second substrates to expand the first metal contact pad and the second metal contact pad into electrical and physical contact with the corresponding conductive interconnects of the second substrate.
8. The method of claim 7 , wherein the second metal pad is differently structured from the first metal pad such that the first metal pad at least partially compensates for thermal expansion of the first TSV during the heating.
9. A method of forming a microelectronic assembly, comprising:
forming a first through substrate via (TSV) provided within a first substrate having a first upper surface, the first TSV extending into the first substrate;
forming a first metal contact pad and a second metal contact pad in the first upper surface, the first metal contact pad aligned with and in electrical communication with the first TSV, the second metal contact pad not aligned with any TSV in the first substrate; and
providing a first recess of the first metal contact pad relative to the first upper surface;
providing a second recess of the second metal contact pad relative to the first upper surface, wherein the first recess is recessed to a greater degree than the second recess; and
preparing the first upper surface, first metal contact pad and second metal contact pad for direct hybrid bonding to form a first bonding surface.
10. The method of forming the microelectronic assembly of claim 9 , wherein:
the first metal contact pad has a larger surface area than the second metal contact pad; and
providing the first recess, providing the second recess and preparing the first upper surface comprises a chemical mechanical planarization to provide a roughness specification for the direct hybrid bonding and to differentially recess the first recess and the second recess.
11. The method of forming the microelectronic assembly of claim 9 , further comprising processing a second lower surface of the first substrate opposite the first upper surface to form a second bonding surface.
12. The method of forming the microelectronic assembly of claim 11 :
wherein the processing comprises thinning the first substrate and depositing one or more layers to balance a stress in the first substrate caused by the first upper surface; and
wherein thinning the first substrate exposes the first TSV, and the one or more layers are formed over the TSV, the method further comprising patterning the one or more layers to form an opening over the first TSV.
13. The method of forming the microelectronic assembly of claim 9 , further comprising direct bonding the first substrate to a second substrate using a direct dielectric-to-dielectric, non-adhesive bonding technique at the first bonding surface of the first substrate.
14. The method of claim 13 , wherein the first recess is recessed to a greater degree than the second recess such that the first recess compensates for thermal expansion of the first TSV during direct bonding of the first metal contact pad with a third metal contact pad of the second substrate.
15. A microelectronic assembly, comprising:
a first substrate comprising a first through substrate via (TSV) and a first bonding surface configured for direct hybrid bonding;
a first metal contact pad at and defining part of the first bonding surface, the first metal contact pad aligned with and in electrical contact with the first TSV; and
a second metal contact pad at and defining part of the first bonding surface, the second metal contact pad not aligned with any TSV in the first substrate, wherein the first metal contact pad has a a larger surface area than the second metal contact pad.
16. The microelectronic assembly of claim 15 , wherein:
the first metal contact pad is recessed by a first recess depth from an upper insulating surface of the first bonding surface;
the second metal contact pad is recessed by a second recess depth from the upper insulating surface of the first bonding surface; and
the first recess depth is greater than the second recess depth.
17. The microelectronic assembly of claim 16 , where the first substrate includes a second bonding surface on a side opposite the first bonding surface.
18. The microelectronic assembly of claim 15 , wherein the first substrate is direct hybrid bonded to a second substrate at the first bonding surface of the first substrate.
19. A microelectronic assembly, comprising:
a first substrate comprising a first bonding surface, the first substrate comprising
a first through substrate via (TSV),
a first metal contact pad at the first bonding surface, the first metal contact pad aligned with and in electrical contact with the first TSV, and
a second metal contact pad at the first bonding surface, the second metal contact pad without a corresponding TSV in the first substrate, wherein the first metal contact pad has a larger surface area than the second metal contact pad; and
a second substrate comprising a second bonding surface, the second substrate comprising
a third metal contact pad at the second bonding surface, and
a fourth metal contact pad at the second bonding surface;
wherein the first bonding surface is direct hybrid bonded to the second bonding surface such that the first metal contact pad is directly bonded to the third metal contact pad and the second metal contact pad is directly bonded to the fourth metal contact pad.
20. The microelectronic assembly of claim 19 , wherein the first substrate includes an additional bonding surface on a side opposite the first bonding surface.
21. The microelectronic assembly of claim 20 , wherein the additional bonding surface is defined by an inorganic dielectric layer and a plurality of additional metal contact pads.
22. The microelectronic assembly of claim 19 , wherein:
the second substrate comprises a second TSV aligned with and electrically connected to the third metal contact pad; and
the third metal contact pad has a larger surface area than the fourth metal contact pad.
23. The microelectronic assembly of claim 15 , where the first metal contact pad is structured differently from the second metal contact pad to at least partially compensate for thermal expansion of the first TSV during direct hybrid bonding.