IP Library Granted Patent US 11,887,555
Granted Patent B2
US 11,887,555 · App. 17/837,097 · Granted Jan 30, 2024

Display device

Inventors: Takayuki Suzuki (Tokyo, JP); Hiroyuki Abe (Tokyo, JP)
Assignee: Japan Display Inc.
G09G3/3677G02F1/1345G02F1/1368G11C19/28G11C19/287G02F1/136286G02F1/136295G02F2201/56G09G2300/0426G09G2310/0286G09G2310/08
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Quick Facts
Patent No.
US 11,887,555
App. No.
17/837,097
Granted
Jan 30, 2024
Kind
B2
Abstract

A display device with a variant-shape display region other than the rectangular display region is configured to form a scanning line drive circuit along the variant-shape display region. The scanning line drive circuit includes bus wiring group with clock wiring for supplying clocks with three or more phases and the power supply wiring for supplying power, and the unit circuits for configuring the shift register including five or more transistors. The bus wiring and the unit circuits are formed on the different regions so as not to cross with one another.

Claims (56)

1. A display device comprising:

a substrate having a display region and a peripheral region;

a scanning line drive circuit having a first unit circuit and a second unit circuit at the peripheral region; and

a plurality of wirings provided outside and along the scanning line drive circuit in a plan view at the peripheral region,

wherein

the plurality of wirings include a plurality of clock wirings, a first power wiring and a second power wiring,

each of the first power wiring and the second power wiring is not supplied with a clock signal,

a layout of the first power wiring is provided the closest to the scanning line driver circuit among the plurality of wirings between an outer edge of the substrate and the scanning line drive circuit, in the plan view,

a layout of the plurality of clock wirings is provided between the first power wiring and the outer edge of the substrate,

a layout of the second power wiring is provided the closest to the scanning line driver circuit among the plurality of wirings between the scanning line drive circuit and the display region, in the plan view,

none of the plurality of clock wirings is provided between the first power wiring and the scanning line drive circuit, in the plan view,

the second unit circuit is shifted from the first unit circuit in a first direction, and is shifted from the first unit circuit in a second direction which crosses the first direction,

the first unit circuit and the second unit circuit are connected via a coupling wiring, and

a layout of the coupling wiring is provided between the first power wiring and the second power wiring, in the plan view.

2. The display device of claim 1 , wherein a width of the first power wiring is smaller than a width of the second power wiring.

3. The display device of claim 2 , further comprises a plurality of scanning lines and a plurality of video signal lines,

the scanning lines arrayed in the second direction at the display region, and

the video signal lines arrayed in the first direction at the display region,

the coupling wiring has a X part extending in the first direction, and

the X part is located between the first unit circuit and the second unit circuit in the second direction.

4. The display device of claim 3 , wherein

each of the first unit circuit and the second unit circuit includes five or more transistors, and

the coupling wiring is connected between at least one of the transistors of the first unit circuit and at least one of the transistors of the second unit circuit.

5. The display device of claim 4 , wherein

the first unit circuit is adjacent to the second unit circuit,

the first unit circuit and the second unit circuit has substantially the same layout, and

the first unit circuit and the second unit circuit are located parallel to each other.

6. The display device of claim 5 ,

the first power wiring has a zigzag pattern along the outer edge of the substrate,

the second power wiring has a zigzag pattern along the outer edge of the substrate, and

the coupling wiring has a zigzag pattern align along the outer edge of the substrate.

7. The display device according to claim 6 , wherein the display device has a variant-shape display region other than a rectangular display region.

8. The display device of claim 1 , wherein

the first clock wiring includes a X part extending in the first direction and a Y part extending in the second direction,

the first connection wiring includes a X part extending in the first direction and a Y part extending in the second direction,

the Y part of the first connection wiring is connected to the Y part of the first clock wiring and is overlapping the Y part of the first clock wiring,

the X part of the first connection wiring is connected to the first unit circuit and the Y part of the first connection wiring.

9. The display device of claim 8 , wherein

the Y part of the first connection wiring has a first end and a second end,

the first end is connected to the first clock wiring via a first contact hole,

the second end is connected to the X part of the first connection wiring.

10. The display device of claim 9 , wherein

the Y part of the first connection wiring overlaps the Y part of the first clock wiring between the first end and the second end in a plan view,

the Y part of the first connection wiring extends in parallel to the Y part of the first clock wiring between the first end and the second end in a plan view.

11. The display device of claim 8 , wherein

the second clock wiring includes a X part extending in the first direction and a Y part extending in the second direction,

the second connection wiring includes a X part extending in the first direction and a Y part extending in the second direction,

the Y part of the second connection wiring is connected to the second clock wiring via a second contact hole at an intersection of the X part of the second clock wiring and the Y part of the second clock wiring,

the Y part of the second connection wiring does not overlap the Y part of the second clock wiring except the second contact hole,

the X part of the second connection wiring is connected to the second unit circuit and the Y part of the second connection wiring.

12. The display device according to claim 1 , wherein

the plurality of clock wirings includes a first clock wiring and a second clock wiring,

the first clock wiring is connected to the first unit circuit via a first connection wiring,

the first connection wiring intersects the first power wiring, in the plan view,

the second clock wiring is connected to the second unit circuit via a second connection wiring, and

the second connection wiring intersects the first power wiring, in the plan view.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
Priority Claims (1)
JP 2015-214354 · Oct 30, 2015 · national
Continuity (5)
Continuation 17132349 · Dec 23, 2020
Continuation 16728199 · Dec 27, 2019
Continuation 16393274 · Apr 24, 2019
Continuation 15284627 · Oct 4, 2016
Related Publication 20220301512A1 · Sep 22, 2022