IP Library › Granted Patent US 12,481,905
Granted Patent B2
US 12,481,905 · App. 17/847,014 · Granted Nov 25, 2025

Synthesis of quantum circuits from native gates

Inventors: Eric Peterson (Yorktown Heights, NY); Lev Samuel Bishop (Dobbs Ferry, NY); Ali Javadiabhari (Sleepy Hollow, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06N10/20G06N10/80
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Quick Facts
Patent No.
US 12,481,905
App. No.
17/847,014
Granted
Nov 25, 2025
Kind
B2
Abstract

A method for a classical computer to synthesize a quantum circuit for use on a quantum computational device includes receiving information for a target operation to be implemented on said quantum computational device, and receiving information regarding native qubit gates that are available on said quantum computational device to be used to implement said quantum circuit; The method further includes determining each of a plurality of quantum circuits formed from said native qubit gates such that each of said plurality of quantum circuits will perform a function substantially equivalent to said target operation when implemented on the quantum computational device. The method further includes selecting one of said plurality of quantum circuits formed from said native qubit gates, based on a performance criterion of said quantum computational device.

Claims (42)

1 . A method for synthesizing a quantum circuit for use on a quantum computational device, comprising:

receiving, on a classical computer, information for a target operation to be implemented on said quantum computational device;

receiving, on said classical computer, information regarding native qubit gates that are available on said quantum computational device to be used to implement said quantum circuit;

determining, on said classical computer, each of a plurality of quantum circuits formed from said native qubit gates such that each of said plurality of quantum circuits will perform a function substantially equivalent to said target operation when implemented on the quantum computational device;

selecting, on said classical computer, one of said plurality of quantum circuits formed from said native qubit gates based on a performance criterion of said quantum computational device,

wherein said target operation is a unitary operator comprising one-qubit and two-qubit operations,

wherein said native qubit gates are one-qubit and XX-type gates, and

wherein said performance criterion is based on operating parameters of said quantum computational device.

2 . The method of claim 1 , further comprising providing the selected one of the plurality of quantum circuits to the quantum computational device for implementation thereon.

3 . The method of claim 1 , wherein selecting one of the plurality of quantum circuits based on the performance criterion comprises optimizing a cost function associated with each of the plurality of quantum circuits.

4 . The method of claim 3 , wherein the cost function is one of an average infidelity of each of the plurality of quantum circuits relative to the target operation, an operation count of native qubit gates in each of the plurality of quantum circuits, a diamond norm of each of the plurality of quantum circuits relative to the target operation, and a Hilbert-Schmidt distance of each of the plurality of quantum circuits relative to the target operation.

5 . The method of claim 3 , wherein the cost function is separable, locally invariant, and monotonic.

6 . The method of claim 1 , wherein determining the plurality of quantum circuits formed from the native qubit gates comprises applying a projection formula.

7 . The method of claim 1 , wherein the XX-type gates comprise an XX 0 gate, an XX 90 gate, and at least one of an XX 15 gate, an XX 22.5 gate, an XX 30 gate, and an XX 45 gate.

8 . A computer program product for synthesizing a quantum circuit for use on a quantum computational device, the computer program product comprising a computer readable medium having non-transient program instructions embodied therewith, the program instructions executable by a classical computer to cause the classical computer to:

receive information for a target operation to be implemented on said quantum computational device;

receive information regarding native qubit gates that are available on said quantum computational device to be used to implement said quantum circuit;

determine each of a plurality of quantum circuits formed from said native qubit gates such that each of said plurality of quantum circuits will perform a function substantially equivalent to said target operation when implemented on the quantum computational device;

select one of said plurality of quantum circuits formed from said native qubit gates based on a performance criterion of said quantum computational device,

wherein said target operation is a unitary operator comprising one-qubit and two-qubit operations,

wherein said native qubit gates are one-qubit and XX-type gates, and

wherein said performance criterion is based on operating parameters of said quantum computational device.

9 . The computer program product of claim 8 , wherein the program instructions executable by a classical computer further cause the classical computer to provide the selected one of the plurality of quantum circuits to the quantum computational device for implementation thereon.

10 . The computer program product of claim 8 , wherein said classical computer selects one of the plurality of quantum circuits based on the performance criterion by optimizing a cost function associated with each of the plurality of quantum circuits.

11 . The computer program product of claim 10 , wherein the cost function is one of an average infidelity of each of the plurality of quantum circuits relative to the target operation, an operation count of native qubit gates in each of the plurality of quantum circuits, a diamond norm of each of the plurality of quantum circuits relative to the target operation, and a Hilbert-Schmidt distance of each of the plurality of quantum circuits relative to the target operation.

12 . The computer program product of claim 10 , wherein the cost function is separable, locally invariant, and monotonic.

13 . The computer program product of claim 8 , wherein said classical computer determines the plurality of quantum circuits formed from the native qubit gates by applying a projection formula.

14 . The computer program product of claim 8 , wherein the XX-type gates comprise an XX 0 gate, an XX 90 gate, and at least one of an XX 15 gate, an XX 22.5 gate, an XX 30 gate, and an XX 45 gate.

15 . A computer system, comprising:

a quantum computational device, comprising a plurality of native qubit gates that are used to implement quantum circuits; and

a classical computer communicatively coupled to the quantum computational device, the classical computer comprising:

a processor configured to receive information for a target operation to be implemented on said quantum computational device, and configured to receive information regarding the plurality of native qubit gates that are available on said quantum computational device;

a synthesis component configured to determine each of a plurality of quantum circuits formed from said plurality of native qubit gates such that each of said plurality of quantum circuits will perform a function substantially equivalent to said target operation when implemented on the quantum computational device, and select one of said plurality of quantum circuits formed from said plurality of native qubit gates based on a performance criterion of said quantum computational device; and

an output component configured to provide the selected one of the plurality of quantum circuits to the quantum computational device for implementation thereon,

wherein said target operation is a unitary operator comprising one-qubit and two-qubit operations,

wherein said plurality of native qubit gates are one-qubit and XX-type gates, and

wherein said performance criterion is based on operating parameters of said quantum computational device.

16 . The computer system of claim 15 , wherein the synthesis component is further configured to select one of the plurality of quantum circuits by optimizing a cost function associated with each of the plurality of quantum circuits.

17 . The computer system of claim 16 , wherein the cost function is one of an average infidelity of each of the plurality of quantum circuits relative to the target operation, an operation count of native qubit gates in each of the plurality of quantum circuits, a diamond norm of each of the plurality of quantum circuits relative to the target operation, and a Hilbert-Schmidt distance of each of the plurality of quantum circuits relative to the target operation.

18 . The computer system of claim 16 , wherein the cost function is separable, locally invariant, and monotonic.

19 . The computer system of claim 15 , wherein the synthesis component is further configured to determine the plurality of quantum circuits by applying a projection formula.

20 . The computer system of claim 15 , wherein the XX-type gates comprise an XX 0 gate, an XX 90 gate, and at least one of an XX 15 gate, an XX 22.5 gate, an XX 30 gate, and an XX 45 gate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2022
From: PETERSON, ERIC; BISHOP, LEV SAMUEL; JAVADIABHARI, ALI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 061108/0183 →
Continuity (2)
Provisional Application 63271212 · Oct 24, 2021
Related Publication 20230289638A1 · Sep 14, 2023
References Cited (19)
US 9514415B2 · Bocharov · 2016 [cited by examiner]
US 10496931B2 · Schoennenbeck et al. · 2019 [cited by applicant]
US 10565514B2 · La Cour et al. · 2020 [cited by applicant]
US 12204991B1 · Ryan · 2025 [cited by examiner]
US 20180039903A1 · Mosca · 2018 [cited by examiner]
US 20210232960A1 · Scott N · 2021 [cited by examiner]
US 20210390235A1 · Bravyi · 2021 [cited by examiner]
US 20220035978A1 · Bravyi · 2022 [cited by examiner]
US 20220138607A1 · Camps · 2022 [cited by examiner]
US 20230080393A1 · Matsuura · 2023 [cited by examiner]
US 20230186128A1 · Bravyi · 2023 [cited by examiner]
US 20230237361A1 · Cowtan · 2023 [cited by examiner]
CN 108334952A · 2018 [cited by applicant]
A Quantum Computational Compiler and Design Tool for Technology-Specific Targets, Smith et al., ISCA 2019, Jun. 22-26, 10 pages (Year: 2019). [cited by examiner]
Shende, Bullock, and Markov in “Minimal Universal Two-qubit Quantum Circuits” give an optimal synthesis method targeting the specific controlled gate CX. [cited by applicant]
Peterson, Smith, Crooks in “Two-qubit circuit depth and the monodromy polytope” , Rigetti Quantum Computing 2919 Seventh St. Berkley, CA 94710. [cited by applicant]
Zhang, Vala, Sastry, and Whaley in “Optimal quantum circuit synthesis from Controlled-U gates” Physical Review A 69, 042309 (2004). [cited by applicant]
Wu, Xin-Chuan, “ Design, Optimization, and Simulation of Scalable Quantum Computing Systems”, A Disseertation Submitted to The Faculty of The Division of The Physical Sciences in Candidacy for The Degree of Doctor of Ph… [cited by applicant]
Borujeni, Sima E., et al., “Quantum Circuit Representation of Bayesian Networks,”—Expert Systems with Applications, vol. 176, Aug. 15, 2021, 114768. [cited by applicant]