Reducing instrumentation code bloat and performance overheads using a runtime call instruction
Techniques for an instruction for a Runtime Call operation are described. An example apparatus comprises decoder circuitry to decode a single instruction, the single instruction to include a field for an identifier of an opcode, the opcode to indicate execution circuitry is to execute a no operation when a runtime call destination equals a predetermined value; and execute an indirect call with the runtime call destination as a destination address when the runtime call destination does not equal the predetermined value. Other examples are described and claimed.
1 . An apparatus comprising:
decoder circuitry to decode a runtime call instruction, the runtime call instruction to include a field for a first opcode, the first opcode to indicate execution circuitry is to perform a runtime call operation; and
the execution circuitry to execute the runtime call instruction according to the first opcode to perform the runtime call operation to:
execute a “no operation” when a runtime call destination equals a predetermined value; and
execute an indirect call with the runtime call destination as a destination address when the runtime call destination does not equal the predetermined value.
2 . The apparatus of claim 1 , comprising a predetermined register to store the runtime call destination.
3 . The apparatus of claim 1 , wherein the execution circuitry is also to execute instructions of an instrumentation handler starting at the destination address.
4 . The apparatus of claim 3 , wherein the execution circuitry is also to perform the runtime call operation at a same privilege level as an application when the runtime call instruction is invoked from the instrumentation handler in user mode.
5 . The apparatus of claim 1 , wherein the execution circuitry is also to execute instructions of a memory check handler starting at the destination address.
6 . The apparatus of claim 1 , wherein the execution circuitry is also to disable instrumentation when the runtime call destination equals the predetermined value.
7 . The apparatus of claim 1 , wherein the predetermined value is zero.
8 . The apparatus of claim 1 , wherein the predetermined value is a known invalid memory address.
9 . The apparatus of claim 1 , wherein the execution circuitry is also to execute the runtime call instruction according to the first opcode to perform the runtime call operation to set a runtime return destination to an address of a next instruction after the runtime call instruction and set an instruction pointer to the runtime call destination when the runtime call destination does not equal the predetermined value.
10 . The apparatus of claim 9 , wherein the decoder circuitry is also to decode a runtime return instruction, the runtime return instruction to include a field for a second opcode, the second opcode to indicate the execution circuitry is to perform a runtime return operation; and
the execution circuitry is also to execute the runtime return instruction according to the second opcode to perform the runtime return operation to generate an exception when the runtime call destination equals the predetermined value; and set an instruction pointer to the runtime return destination and set the runtime return destination to the predetermined value when the runtime return destination does not equal the predetermined value.
11 . The apparatus of claim 1 , comprising a pair of registers to store a corresponding pair of destination addresses, wherein a first register of the pair is for a user mode and a second register of the pair is for a supervisor mode.
12 . The apparatus of claim 1 , wherein the execution circuitry is also to execute the runtime call instruction according to the first opcode to perform the runtime call operation to:
generate a random value when the runtime call destination does not equal the predetermined value;
set a runtime return destination to an address of a next instruction after the runtime call instruction and set an instruction pointer to the runtime call destination when the random value is less than a range of the random value multiplied by a desired probability of executing a plurality of runtime call instructions; and
execute “a no operation” when the random value is not less than the range.
13 . The apparatus of claim 1 , wherein the runtime call instruction is to include a field for an immediate operand, the immediate operand to indicate a selected register to store the destination address.
14 . The apparatus of claim 1 , wherein the runtime call instruction is to include a field for an immediate operand, the immediate operand to indicate a selected register to store the destination address, and the execution circuitry is also to execute instructions of a corresponding instrumentation handler starting at the destination address indicated by the selected register.
15 . A method, comprising:
fetching an instruction having a field for a first opcode, the first opcode indicating a runtime call operation;
decoding the instruction according to the first opcode;
scheduling execution of the instruction; and
executing the decoded instruction to:
execute a “no operation” in response to a runtime call destination being equal to a predetermined value; and
execute an indirect call with the runtime call destination as a destination address in response to the runtime call destination not being equal the predetermined value.
16 . The method of claim 15 , comprising storing the runtime call destination in a predetermined register.
17 . The method of claim 15 , comprising executing instructions of an instrumentation handler starting at the destination address.
18 . The method of claim 17 , comprising executing the instruction at a same privilege level as an application when the instruction is invoked from the instrumentation handler in user mode.
19 . The method of claim 15 , comprising executing instructions of a memory check handler starting at the destination address.
20 . The method of claim 15 , comprising disabling instrumentation when the runtime call destination equals the predetermined value.
21 . The method of claim 15 , wherein the predetermined value is zero.
22 . The method of claim 15 , wherein the predetermined value is a known invalid memory address.
23 . The method of claim 15 , comprising performing the runtime call operation to set a runtime return destination to an address of a next instruction after the instruction and set an instruction pointer to the runtime call destination when the runtime call destination does not equal the predetermined value.
24 . The method of claim 23 , comprising fetching and decoding a runtime return instruction, the runtime return instruction to include a field for a second opcode, the second opcode to indicate execution circuitry is to perform a runtime return operation; and executing the runtime return instruction according to the second opcode to perform the runtime return operation to generate an exception when the runtime call destination equals the predetermined value; and set an instruction pointer to the runtime return destination and set the runtime return destination to the predetermined value when the runtime return destination does not equal the predetermined value.
25 . A system, comprising:
a memory to store a runtime call instruction; and
a processor coupled to the memory, the processor to execute the runtime call instruction to execute a “no operation” when a runtime call destination equals a predetermined value; and execute an indirect call with the runtime call destination as a destination address when the runtime call destination does not equal the predetermined value.
26 . The system of claim 25 , comprising a predetermined register to store the runtime call destination.
27 . The system of claim 25 , wherein the processor is also to execute instructions of an instrumentation handler starting at the destination address.
28 . The system of claim 27 , wherein the processor is also to execute the runtime call instruction at a same privilege level as an application when the runtime call instruction is invoked from the instrumentation handler in user mode.
29 . The system of claim 25 , wherein the processor is also to execute instructions of a memory check handler starting at the destination address.
30 . The system of claim 25 , wherein the processor is also to disable instrumentation when the runtime call destination equals the predetermined value.