Direct memory writes by network interface of a graphics processing unit
Examples described herein relate to a first graphics processing unit (GPU) with at least one integrated communications system, wherein the at least one integrated communications system is to apply a reliability protocol to communicate with a second at least one integrated communications system associated with a second GPU to copy data from a first memory region to a second memory region and wherein the first memory region is associated with the first GPU and the second memory region is associated with the second GPU.
1. An apparatus comprising:
a first graphics processing unit (GPU) with at least one integrated communications system, wherein the at least one integrated communications system is to apply a reliability protocol to communicate with a second at least one integrated communications system associated with a second GPU to copy data from a first memory region to a second memory region and wherein the first memory region is associated with the first GPU and the second memory region is associated with the second GPU.
2. The apparatus of claim 1 , wherein
the at least one integrated communications system comprises a communications system integrated into a same integrated circuit or system on chip (SoC) as that of the first GPU and
the second at least one integrated communications system comprises a communications system integrated into a same integrated circuit or SoC as that of the first GPU and the second GPU.
3. The apparatus of claim 1 , wherein the at least one integrated communications system comprises:
direct memory access (DMA) circuitry;
reliable transport circuitry; and
a network interface controller.
4. The apparatus of claim 1 , wherein the at least one integrated communications system is to perform topology discovery to discover the second at least one integrated communications system.
5. The apparatus of claim 1 , comprising a device interface to communicatively couple the at least one integrated communications system to one or more execution units of the first GPU.
6. The apparatus of claim 1 , comprising a first memory associated with the first GPU and a second memory associated with the second GPU, wherein the first memory comprises a source of data and the second memory comprises a destination of data.
7. The apparatus of claim 1 , comprising:
a network interface device to receive and apply control configurations for the at least one integrated communications system and the second at least one integrated communications system.
8. The apparatus of claim 1 , wherein the at least one integrated communications system and the second at least one integrated communications system are to communicate with at least one GPU of another system.
9. The apparatus of claim 1 , comprising:
a network interface device to provide communications among the first GPU, the second GPU, and at least one GPU of another system.
10. The apparatus of claim 1 , comprising:
at least one central processing unit communicatively coupled to the first GPU and the second GPU, wherein the at least one central processing unit is to communicate with at least one GPU of another system using the at least one integrated communications system and the second at least one integrated communications system.
11. The apparatus of claim 1 , comprising:
a GPU-to-GPU connection to provide communication between the at least one integrated communications system and the second at least one integrated communications system.
12. The apparatus of claim 1 , comprising:
fabric to provide communication among the first and second GPUs and at least one GPU of another system.
13. At least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed, cause one or more processors to:
configure at least one network interface device of a first graphics processing unit (GPU) to configure data planes of one or more other network interface devices, wherein the at least one network interface device is to use a reliability protocol to communicate with another at least one network interface device associated with a second GPU to copy data from a first memory to a second memory and wherein the first memory is associated with the first GPU and the second memory is associated with the second GPU.
14. The computer-readable medium of claim 13 , comprising instructions stored thereon, that if executed, cause one or more processors to:
perform topology discovery to discover at least one network interface device.
15. The computer-readable medium of claim 13 , wherein:
the at least one network interface device of a first GPU comprises a communications system integrated into a same integrated circuit or system on chip (SoC) as that of the first GPU and
the another at least one network interface device associated with a second GPU comprises a communications system integrated into a same integrated circuit or SoC as that of the second GPU.
16. A method comprising:
in an integrated circuit with multiple graphics processing units (GPUs):
providing communications among the multiple GPUs by communications systems integrated into the multiple GPUs and a GPU-to-GPU connection,
providing communications among the multiple GPUs and at least one GPU of another integrated circuitry by a communications systems integrated into the multiple GPUs and a switching network,
configuring the communications systems integrated into the multiple GPUs by a network interface device coupled to a control network.
17. The method of claim 16 , wherein:
a first communications systems of the communications systems integrated into the multiple GPUs is integrated into a same integrated circuit or system on chip (SoC) as that of a first GPU of the multiple GPUs and
a second communications systems of the communications systems integrated into the multiple GPUs is integrated into a same integrated circuit or SoC as that of a second GPU of the multiple GPUs.
18. The method of claim 17 , wherein the communications among the multiple GPUs utilize reliable transport.
19. The method of claim 17 , comprising:
one or more switches, in a scale out network, performing topology discovery to discover at least one GPU of the multiple GPUs.
20. The method of claim 17 , comprising:
providing communications among central processing units, accelerators, and GPUs by selection among at least one of the communications systems integrated into the multiple GPUs or a network interface device.