Semiconductor device for recessed fin structure having rounded corners

1. A semiconductor device comprising:

an isolation insulating layer disposed over a substrate;

a plurality of fin structures disposed over the substrate and extending in a first direction in plan view;

a gate structure disposed over parts of the plurality of fin structures, and extending in a second direction crossing the first direction;

a merged source/drain epitaxial layer; and

a dielectric layer disposed on an upper surface of the isolation insulating layer, wherein:

the plurality of fin structures not covered by the gate structure are recessed below the upper surface of the isolation insulating layer to form a plurality of recessed fin structures,

the merged source/drain epitaxial layer is formed over the plurality of recessed fin structures, and

each of interfaces between the merged source/drain epitaxial layer and each of the plurality of recessed fin structures has a rounded corner shape both in a cross section along the first direction and in a cross section along the second direction, and

wherein depths of the interfaces measured from an upper surface of the isolation insulating layer is in a range from 5 nm to 20 nm.

2. The semiconductor device of claim 1 , wherein the depths are not uniform.

3. The semiconductor device of claim 2 , wherein a difference between a maximum depth and a minimum depth is in a range from 0.5 nm to 2.5 nm.

4. The semiconductor device of claim 1 , wherein the rounded corner shape is one of a U-shape and a bullet head shape in the cross section along the second direction.

5. The semiconductor device of claim 1 , wherein the rounded corner shape is other than a semi-circular shape in the cross section along the second direction.

6. The semiconductor device of claim 1 , wherein the interfaces have a U-shape having a straight bottom in a cross section along the first direction.

7. The semiconductor device of claim 6 , wherein the rounded corner shape is a semi-circular shape in the cross section along the second direction.

8. The semiconductor device of claim 1 , wherein curved portions of the rounded corner shape do not have a constant curvature.

9. The semiconductor device of claim 1 , wherein a number of the plurality of recessed fin structures coupled to the merged source/drain epitaxial layer is five to twenty.

10. The semiconductor device of claim 1 , wherein an upper surface of the merged source/drain epitaxial layer has an uneven surface.

11. The semiconductor device of claim 10 , wherein a peak-to-valley value of the uneven upper surface of the merged source/drain epitaxial layer in the second direction is in a range from 5 nm to 20 nm.

12. The semiconductor device of claim 1 , further comprising:

a first via plug contacting the merged source/drain epitaxial layer; and

a second via plug contacting the merged source/drain epitaxial layer,

wherein the first via plug and the second via plug are electrically coupled to different circuit elements from each other.

13. The semiconductor device of claim 12 , wherein two or more gate structure are disposed over the plurality of fin structures.

14. A semiconductor device comprising:

an isolation insulating layer disposed over a substrate;

a first fin structure and a second fin structure, both disposed over the substrate and extending in a first direction in plan view;

a gate structure disposed over parts of the first and second fin structures, and extending in a second direction crossing the first direction;

a merged source/drain epitaxial layer;

a dielectric layer disposed on an upper surface of the isolation insulating layer, wherein:

the first and second fin structures not covered by the gate structure are recessed below the upper surface of the isolation insulating layer,

the merged source/drain epitaxial layer is formed over the recessed first and second fin structures, and each of interfaces between the merged source/drain epitaxial layer and each of the recessed first and second fin structures has a rounded corner shape both in a cross section along the first direction and in a cross section along the second direction; and

a void formed between the merged source/drain epitaxial layer and the upper surface of the isolation insulating layer.

15. The semiconductor device of claim 14 , wherein the interfaces have a U-shape having a straight bottom in a cross section along the first direction.

16. The semiconductor device of claim 15 , wherein the rounded corner shape is a semi-circular shape in the cross section along the second direction.

17. The semiconductor device of claim 15 , wherein the rounded corner shape is other than a semi-circular shape in the cross section along the second direction.

18. The semiconductor device of claim 15 , wherein curved portions of the rounded corner shape do not have a constant curvature.

19. A semiconductor device comprising:

an isolation insulating layer disposed over a substrate;

a fin structure disposed over the substrate and extending in a first direction in plan view;

a gate structure disposed over a part of the fin structure, and extending in a second direction crossing the first direction;

a source/drain epitaxial layer;

a dielectric layer disposed on an upper surface of the isolation insulating layer, wherein:

the fin structure not covered by the gate structure is recessed below the upper surface of the isolation insulating layer,

the source/drain epitaxial layer is formed over the recessed fin structure; and

an interface between the source/drain epitaxial layer and the recessed fin structure has a rounded corner shape both in a cross section along the first direction and in a cross section along the second direction,

wherein a depth of the interface measured from the upper surface of the isolation insulating layer is in a range from 5 nm to 20 nm.

20. The semiconductor device of claim 19 , wherein the interface has a U-shape having a straight bottom in a cross section along the first direction.