Semiconductor device and method for fabricating the same
A semiconductor device includes: a dielectric structure in which etch stop structures and low-k layers are alternately stacked over a substrate; and a metal interconnection electrically connected to the substrate in the dielectric structure, wherein each one of the etch stop structures includes: a first etch stop layer including a hydrogen blocking material; and a second etch stop layer formed over the first etch stop layer.
1. A semiconductor device, comprising:
a dielectric structure in which etch stop structures and low-k layers are alternately stacked over a substrate; and
a metal interconnection electrically connected to the substrate in the dielectric structure,
wherein each one of the etch stop structures includes:
a first etch stop layer which is a silicon-rich silicon nitride having a higher silicon content than silicon nitride (Si 3 N 4 ); and
a second etch stop layer which is a silicon nitride containing carbon on the first etch stop layer.
2. The semiconductor device of claim 1 , wherein the second etch stop layer includes SiCN.
3. The semiconductor device of claim 1 , wherein a thickness of the first etch stop layer is smaller than a thickness of the second etch stop layer.
4. The semiconductor device of claim 1 , wherein a thickness of each of the etch stop structures is smaller than a thickness of each of the low-k layers.
5. The semiconductor device of claim 1 , wherein the low-k layers include silicon oxide (SiCOH) containing carbon and oxygen.
6. The semiconductor device of claim 1 , further comprising:
a hydrogen supply layer over the dielectric structure.
7. The semiconductor device of claim 6 , wherein the hydrogen supply layer includes High Density Plasma (HDP) oxide, silicon nitride, or a combination thereof.
8. The semiconductor device of claim 1 , wherein the etch stop structure further includes:
a third etch stop layer including another hydrogen blocking material over the second etch stop layer.
9. The semiconductor device of claim 8 , wherein the third etch stop layer includes a silicon-rich silicon nitride having a higher silicon content than silicon nitride (Si 3 N 4 ).
10. The semiconductor device of claim 1 , wherein the metal interconnection includes a multi-level metal interconnection.
11. The semiconductor device of claim 1 , wherein the substrate is provided with a transistor including a gate dielectric layer.
12. A method for fabricating a semiconductor device, comprising:
forming a dielectric structure in which etch stop structures and low-k layers are alternately stacked over a substrate provided with a transistor including a gate dielectric layer; and
forming a metal interconnection electrically connected to the substrate in the dielectric structure,
wherein each one of the etch stop structures includes:
a first etch stop layer which is a silicon-rich silicon nitride having a higher silicon content than silicon nitride (Si 3 N 4 ); and
a second etch stop layer which is a silicon nitride containing carbon on the first etch stop layer.
13. The method of claim 12 , further comprising:
performing an annealing process for supplying hydrogen to a surface of the substrate, after the forming of the metal interconnection electrically connected to the substrate in the dielectric structure.
14. The method of claim 12 , further comprising:
after the forming of the metal interconnection electrically connected to the substrate in the dielectric structure,
forming a hydrogen supply layer over the dielectric structure; and
performing an annealing process for supplying hydrogen to a surface of the substrate.
15. The method of claim 12 , wherein the first and second etch stop layers are formed in-situ in the same chamber.
16. The method of claim 12 , wherein the second etch stop layer includes SiCN.
17. The method of claim 12 , wherein each one of the low-k layers includes silicon oxide (SiCOH) containing carbon and oxygen.
18. The method of claim 14 , wherein the hydrogen supply layer includes High Density Plasma (HDP) oxide, silicon nitride, or a combination thereof.
19. The method of claim 13 , wherein the annealing process is performed in an atmosphere of hydrogen or deuterium.
20. The method of claim 12 , wherein each one of the etch stop structures further includes:
a third etch stop layer including another hydrogen blocking material over the second etch stop layer.
21. The method of claim 20 , wherein the third etch stop layer includes a silicon-rich silicon nitride having a higher silicon content than silicon nitride (Si 3 N 4 ).