IP Library Granted Patent US 11,908,423
Granted Patent B2
US 11,908,423 · App. 17/864,764 · Granted Feb 20, 2024

Display device and method of driving the same

Inventors: Boyong Chung (Suwon-si, KR); Jonghee Kim (Yongin-si, KR); Hyuk Kim (Suwon-si, KR); Joosun Yoon (Seoul, KR); Tak-Young Lee (Anyang-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
G09G3/3291G09G3/3266G09G3/3275G09G3/3258G09G2310/0272G09G2330/025G09G2330/026G09G2330/027G09G2330/028
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Quick Facts
Patent No.
US 11,908,423
App. No.
17/864,764
Granted
Feb 20, 2024
Kind
B2
Abstract

A display device includes a display panel including a plurality of pixels, a gate driver which provides a gate signal to corresponding pixels of the plurality of pixels, a data driver which provides a data voltage to the corresponding pixels of the plurality of pixels, a power voltage generator which provides a pixel power voltage to each of the plurality of pixels, and provides a gate power voltage to the gate driver, and a controller which provides a gate control signal to the gate driver. The pixel power voltage, the data voltage, and the gate control signal sequentially have a ground voltage level in response to a power-off signal.

Claims (38)

1. A display device, comprising:

a display panel including a plurality of pixels;

a gate driver which provides a gate signal to corresponding pixels of the plurality of pixels;

a data driver which provides a data voltage to the corresponding pixels of the plurality of pixels;

a power voltage generator which provides a pixel power voltage to each of the plurality of pixels, and provides a gate power voltage to the gate driver; and

a controller which provides a gate control signal to the gate driver,

wherein the pixel power voltage, the data voltage, and the gate control signal sequentially have a ground voltage level in response to a power-off signal so that a scan clock signal, a sensing clock signal and a carry clock signal of the gate control signal only have the ground voltage level after the data voltage has the ground voltage level.

2. The display device of claim 1 , wherein the pixel power voltage includes a first power voltage and a second power voltage having a voltage level lower than a voltage level of the first power voltage after a power-on, and

wherein the second power voltage has the ground voltage level after the first power voltage has the ground voltage level in response to the power-off signal.

3. The display device of claim 2 , wherein the first power voltage gradually decreases from a normal voltage level to the ground voltage level in response to the power-off signal.

4. The display device of claim 3 , wherein the first power voltage decreases to the ground voltage level after the first power voltage decreases to a voltage level between the normal voltage level and the ground voltage level in response to the power-off signal.

5. The display device of claim 1 , wherein a time interval between a time point at which the data voltage has the ground voltage level and a time point at which the gate control signal has the ground voltage level is at least one frame time.

6. The display device of claim 1 , wherein the gate control signal and the gate power voltage substantially simultaneously have the ground voltage level in response to the power-off signal.

7. The display device of claim 1 , wherein the gate control signal, the data voltage, and the pixel power voltage sequentially have a normal voltage level in response to a power-on signal.

8. The display device of claim 7 , wherein the pixel power voltage includes a first power voltage and a second power voltage having a voltage level lower than a voltage level of the first power voltage after a power-on, and

wherein the first power voltage has the normal voltage level after the second power voltage has the normal voltage level in response to the power-on signal.

9. The display device of claim 8 , wherein the first power voltage gradually increases from the ground voltage level to the normal voltage level in response to the power-on signal.

10. The display device of claim 9 , wherein the first power voltage increases to the normal voltage level after the first power voltage increases to a voltage level between the ground voltage level and the normal voltage level in response to the power-on signal.

11. The display device of claim 1 , wherein the gate control signal and the data voltage substantially simultaneously have the ground voltage level in response to a shutdown signal.

12. The display device of claim 11 , wherein the gate control signal, the data voltage, and the gate power voltage substantially simultaneously have the ground voltage level in response to the shutdown signal.

13. The display device of claim 1 , wherein the gate control signal includes a plurality of clock signals and a plurality of control signals.

14. The display device of claim 1 , wherein the gate power voltage includes a plurality of power voltages.

15. A method of driving a display device, the method comprising:

controlling a pixel power voltage provided to a plurality of pixels from a power voltage generator to have a ground voltage level in response to a power-off signal;

controlling a data voltage provided to corresponding pixels of the plurality of pixels from a data driver to have the ground voltage level after the pixel power voltage has the ground voltage level; and

controlling a scan clock signal, a sensing clock signal and a carry clock signal of a gate control signal provided to a gate driver from a controller to only have the ground voltage level after the data voltage has the ground voltage level.

16. The method of claim 15 , wherein the pixel power voltage includes a first power voltage and a second power voltage having a voltage level lower than a voltage level of the first power voltage after a power-on, and

wherein the controlling the pixel power voltage to have the ground voltage level includes:

controlling the first power voltage to have the ground voltage level in response to the power-off signal; and

controlling the second power voltage to have the ground voltage level after the first power voltage has the ground voltage level.

17. The method of claim 16 , wherein the first power voltage gradually decreases from a normal voltage level to the ground voltage level in response to the power-off signal.

18. The method of claim 15 , wherein a time interval between a time point at which the data voltage has the ground voltage level and a time point at which the gate control signal has the ground voltage level is at least one frame time.

19. The method of claim 15 , further comprising:

controlling the gate control signal to have a normal voltage level in response to a power-on signal;

controlling the data voltage to have the normal voltage level after the gate control signal has the normal voltage level; and

controlling the pixel power voltage to have the normal voltage level after the data voltage has the normal voltage level.

20. The method of claim 15 , further comprising:

controlling the gate control signal and the data voltage to substantially simultaneously have the ground voltage level in response to a shutdown signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2023
From: CHUNG, BOYONG; KIM, JONGHEE; KIM, HYUK; YOON, JOOSUN; LEE, TAK-YOUNG
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 063594/0175 →
Priority Claims (1)
KR 10-2021-0173179 · Dec 6, 2021 · national
Continuity (1)
Related Publication 20230178031A1 · Jun 8, 2023