IP Library › Granted Patent US 11,804,171
Granted Patent B2
US 11,804,171 · App. 17/889,303 · Granted Oct 31, 2023

Pixel circuit that includes a first leakage compensation switching element and display apparatus having the same

Inventors: Junhyun Park (Suwon-si, KR); Hyeongseok Kim (Hwaseong-si, KR); Jangmi Kang (Seoul, KR); Minjae Jeong (Hwaseong-si, KR); Mukyung Jeon (Ulsan, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/32G09G2300/0842G09G2310/0267G09G2310/0275
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Quick Facts
Patent No.
US 11,804,171
App. No.
17/889,303
Granted
Oct 31, 2023
Kind
B2
Abstract

A pixel circuit includes a light emitting element, a driving switching element, a storage capacitor, a data voltage applying switching element and a first leakage compensation switching element. The driving switching element is configured to apply a driving current to the light emitting element. The storage capacitor is connected to a control electrode of the driving switching element. The data voltage applying switching element is configured to apply a data voltage to the storage capacitor. The first leakage compensation switching element is disposed between the storage capacitor and the data voltage applying switching element.

Claims (43)

1. A pixel circuit comprising:

a light emitting element;

a first switching element configured to apply a driving current to the light emitting element;

a storage capacitor connected to a control electrode of the first switching element, the storage capacitor including a first electrode;

a second switching element configured to apply a data voltage to the storage capacitor;

a third switching element disposed between the storage capacitor and the second switching element; and

a hold capacitor including a first electrode receiving a first power voltage and a second electrode connected to the first electrode of the storage capacitor,

wherein the second switching element comprises a first electrode configured to receive the data voltage and a second electrode connected to a first electrode of the another switching element, and

wherein the third switching element comprises the first electrode connected to the second electrode of the second switching element and a second electrode connected to the storage capacitor.

2. The pixel circuit of claim 1 , wherein the first switching element and the second switching element are P-type transistors, and

wherein the third switching element is an N-type transistor.

3. The pixel circuit of claim 1 , further comprising a fourth switching element that includes an input electrode connected to the control electrode of the first switching element and a control electrode connected to the control electrode of the third switching element.

4. The pixel circuit of claim 3 , wherein the first switching element and the data voltage applying voltage are P-type transistors, and

wherein the third switching element and the fourth switching element are N-type transistors.

5. The pixel circuit of claim 3 , further comprising a fifth switching element connected to an output electrode of the fourth switching element and configured to apply an initialization voltage to the output electrode of the fourth switching element, wherein the fifth switching element is a P-type transistor and the fourth switching element is an N-type transistor.

6. The pixel circuit of claim 5 , further comprising a sixth switching element disposed between an output electrode of the comprising a fifth switching element and an output electrode of the first switching element.

7. The pixel circuit of claim 5 , further comprising a seventh switching element connected to an anode electrode of the light emitting element.

8. The pixel circuit of claim 7 , wherein a control signal applied to a control electrode of the fifth switching element is an N-th data initialization gate signal, and

wherein a control signal applied to a control electrode of the seventh switching element is an (N+K)-th data initialization gate signal, and

wherein N is a positive integer and K is a positive integer.

9. The pixel circuit of claim 7 , wherein a control electrode applied to a control electrode of the fifth switching element is a data initialization gate signal, and

wherein a control signal applied to a control electrode of the seventh switching element is a light emitting element initialization gate signal different from the data initialization gate signal.

10. The pixel circuit of claim 7 , wherein a light emitting element initialization voltage applied to an input electrode of the seventh switching element is substantially the same as an initialization voltage applied to an input electrode of the data initialization fifth switching element.

11. The pixel circuit of claim 1 , further comprising an eighth switching element connected to an input electrode of the third switching element.

12. The pixel circuit of claim 11 , wherein the first switching element and the second switching element are P-type transistors, and

wherein the first third switching element and the eighth switching element are N-type transistors.

13. The pixel circuit of claim 11 , wherein a voltage applied to an input electrode of the eighth switching element is substantially the same as a voltage applied to an input electrode of the first switching element.

14. The pixel circuit of claim 1 , wherein the first power voltage is applied to an input electrode of the first switching element.

15. A display apparatus comprising:

a display panel that includes a pixel;

a gate driver configured to output a gate signal to the pixel;

a data driver configured to output a data voltage to the pixel; and

an emission driver configured to output an emission signal to the pixel,

wherein the pixel comprises:

a light emitting element;

a first switching element configured to apply a driving current to the light emitting element;

a storage capacitor connected to a control electrode of the first switching element, the storage capacitor including a first electrode;

a second switching element configured to apply a data voltage to the storage capacitor;

a third switching element disposed between the storage capacitor and the second switching element; and

a hold capacitor including a first electrode receiving a first power voltage and a second electrode connected to the first electrode of the storage capacitor,

wherein the second switching element comprises a first electrode configured to receive the data voltage and a second electrode connected to a first electrode of the another switching element, and

wherein the third switching element comprises the first electrode connected to the second electrode of the second switching element and a second electrode connected to the storage capacitor.

16. The display apparatus of claim 15 , wherein the first power voltage is applied to an input electrode of the first switching element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2022
From: PARK, JUNHYUN; KIM, HYEONGSEOK; KANG, JANGMI; JEONG, MINJAE; JEON, MUKYUNG
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 060825/0787 →
Priority Claims (1)
KR 10-2021-0126729 · Sep 24, 2021 · national
Continuity (1)
Related Publication 20230099387A1 · Mar 30, 2023
Cited By (4)
US 12,205,527 US 12,499,817 US 12,548,525 US 12,586,520