IP Library › Granted Patent US 12,027,966
Granted Patent B2
US 12,027,966 · App. 17/892,085 · Granted Jul 2, 2024

Control circuit and method for use in stackable multiphase power converter

Inventors: Ta-Yung Yang (Taoyuan, TW); Wei-Chuan Wu (Hsinchu, TW); Chih-Hao Yang (Tainan, TW); Ping-Ching Huang (Taipei, TW); Li-Wen Fang (Taipei, TW)
Assignee: RICHTEK TECHNOLOGY CORPORATION
H02M1/084H02M1/0041H02M1/0043H02M3/158
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Quick Facts
Patent No.
US 12,027,966
App. No.
17/892,085
Granted
Jul 2, 2024
Kind
B2
Abstract

A control circuit for controlling a stackable multiphase power converter includes: a synchronization terminal; a synchronization signal connected to the synchronization terminals of a plurality of the control circuits in parallel, wherein the synchronization signal includes a plurality of pulses to be successively counted as a count number; and a reset signal, configured to reset and initiate the count number; wherein the control circuit further comprises a phase-sequence number, wherein the control circuit enables a corresponding power stage circuit to generate a phase of the output power when the count number reaches the phase-sequence number.

Claims (31)

1. A control circuit for use in controlling a stackable multiphase power converter, wherein the stackable multiphase power converter includes plural power stage circuits and a corresponding number of a plurality of the control circuits, wherein the plural power stage circuits are coupled in parallel to generate an output power to a load, wherein each of the power stage circuits includes at least one switch for controlling an inductor, wherein each of the control circuits is coupled to the corresponding one of the power stage circuits, the control circuit comprising:

a synchronization terminal;

a synchronization signal, configured to be connected to the synchronization terminals, in parallel, corresponding to the plurality of control circuits, wherein the synchronization signal includes a plurality of pulses to be successively counted as a count number; and

a reset signal, configured to reset and initiate the count number;

wherein the control circuit further comprises a phase-sequence number, wherein the control circuit enables the corresponding power stage circuit to generate the output power when the count number is correlated to the phase-sequence number.

2. The control circuit as claimed in claim 1 , further comprising a set-terminal for setting the phase-sequence number, wherein the phase-sequence number is determined according to an electrical parameter level on the set-terminal.

3. The control circuit as claimed in claim 1 , wherein the control circuit further determines to operate as a master circuit or a slave circuit according to the phase-sequence number;

wherein the master circuit generates the synchronization signal through the synchronization terminal and the slave circuit is coupled to receive the synchronization signal through the synchronization terminal;

wherein the master circuit generates the reset signal, wherein and the slave circuit is coupled to receive the reset signal.

4. The control circuit as claimed in claim 1 , further comprising a counter, configured to successively count the pulses of the synchronization signal to generate the count number; wherein the reset signal is generated when the count number reaches than a maximum number.

5. The control circuit as claimed in claim 1 , wherein the reset signal is generated when the count number reaches a phase-shed phase number, wherein the phase-shed phase number is increased in response to the increase of the current of the load.

6. The control circuit as claimed in claim 3 , the control circuit comprising:

a sync circuit, configured to operably generate the synchronization signal through the synchronization terminal when the control circuit is configured as the master circuit, and receive the synchronization signal through the synchronization terminal when the control circuit is configured as the slave circuit.

7. The control circuit as claimed in claim 3 , the control circuit further comprising:

a reset terminal, wherein the reset signal is connected to the reset terminals, in parallel, corresponding to the plurality of control circuits; and

a reset circuit, configured to operably generate the reset signal through the reset terminal when the control circuit is configured as the master circuit, and receive the reset signal when the control circuit is configured as the slave circuit.

8. The control circuit as claimed in claim 7 , wherein a pulse width of the reset signal is shorter than a pulse width of the synchronization signal.

9. The control circuit as claimed in claim 1 , wherein a pulse having a higher voltage level of the synchronization signal represents the reset signal.

10. The control circuit as claimed in claim 1 , wherein the power stage circuit is a constant on-time (COT) power converter; the COT power converter is triggered on in response to the pulse of the synchronization signal.

11. The control circuit as claimed in claim 1 , the control circuit further comprising a constant current source which is coupled to a resistor through the set-terminal, wherein the phase-sequence number is determined according to a voltage level of the set-terminal.

12. The control circuit as claimed in claim 1 , wherein the control circuit is configured as an integrated circuit and the synchronization terminal corresponds to a synchronization pin of the integrated circuit.

13. A method for controlling a stackable multiphase power converter, wherein the stackable multiphase power converter includes plural power stage circuits and a corresponding number of a plurality of controllers, wherein the plural power stage circuits are coupled in parallel to generate an output power to a load, wherein each of the power stage circuits includes at least one switch for controlling an inductor, wherein each of the controllers is coupled to the corresponding one of the power stage circuits, the method comprising:

generating a synchronization signal connected to the controllers of stackable multiphase power converter in parallel without the daisy chain configuration;

generating a reset signal in accordance with the synchronization signal;

wherein each of the controller includes a phase-sequence number, wherein the synchronization signal includes a plurality of pulses to successively generate a count number, wherein the controller enables the corresponding stackable multiphase power converter to generate the output power to the load when the count number is correlated to the phase-sequence number, wherein the reset signal is coupled to reset and initiate the count number.

14. The method as claimed in claim 13 , wherein a higher voltage-level pulse of the synchronization signal represents the reset signal.

15. The method as claimed in claim 13 , further comprising: generating the phase-sequence number through a set-terminal; the phase-sequence number is determined according to the voltage level at the set-terminal.

16. The method as claimed in claim 13 , wherein the phase-sequence number further determines the controller as a master or a slave, wherein the master generates the synchronization signal, wherein the slave is configured to receive the synchronization signal.

17. The method as claimed in claim 13 , wherein the reset signal is enabled when the count number reaches than a maximum number.

18. The method as claimed in claim 13 , wherein the reset signal is enabled when the count number reaches a phase-shed phase number, wherein the phase-shed phase number is generated and increased in response to the increase of the output current of the load.

19. The method as claimed in claim 13 , wherein the stackable multiphase power converter is a constant on-time (COT) power converter, wherein the COT power converter is triggered on in response to the pulse of the synchronization signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2022
From: YANG, TA-YUNG; WU, WEI-CHUAN; YANG, CHIH-HAO; HUANG, PING-CHING; FANG, LI-WEN
To: RICHTEK TECHNOLOGY CORPORATION
Reel/Frame 060863/0786 →
Continuity (2)
Provisional Application 63302455 · Jan 24, 2022
Related Publication 20230238875A1 · Jul 27, 2023
Cited By (2)
US 12,273,035 US 12,738,844