Power management component for memory sub-system power cycling

1. A system, comprising:

a plurality of system components; and

a power management component comprising a plurality of regulators configured to output respective operating voltages for the plurality of system components;

wherein the power management component is configured to, in response to receipt of an event signal:

prevent, in response to respective voltage levels of a set of the plurality of regulators having not reached respective threshold voltage levels, the plurality of regulators from outputting increased voltage levels until the voltage levels of the set of the plurality of regulators are determined to have reached the respective threshold voltage levels; and

allow the plurality of regulators to output increased voltage levels responsive to determining that the voltage levels of the set have reached the respective threshold voltage levels.

2. The system of claim 1 , wherein the system is a memory sub-system, and wherein:

the event signal corresponds to a power cycling event of the memory sub-system; and

the power management component is configured to prevent the power cycling event of the memory sub-system from occurring unless the voltage levels of the set are determined to have reached the respective threshold voltage levels.

3. The system of claim 2 , wherein the power management component is configured to allow the power cycling event to occur responsive to determining that the voltage levels of the set have reached the respective threshold voltage levels.

4. The system of claim 1 , wherein the threshold voltage levels corresponding to the voltage levels of the set of the plurality of regulators comprise at least two different respective threshold voltage levels.

5. The system of claim 1 , wherein the event of the system is a restart of the system.

6. The system of claim 1 , wherein the plurality of regulators comprises a low-dropout (LDO) regulator, a buck-boost converter, a buck regulator, a boost regulator, or combinations thereof.

7. The system of claim 1 , wherein the power management component comprises a power management integrated circuit (PMIC).

8. The system of claim 1 , wherein the respective operating voltages correspond to input/output (I/O) voltage rails, supply voltage rails, reference voltage rails, or combinations thereof.

9. The system of claim 1 , wherein system comprises a solid state drive (SSD).

10. A power management component, comprising:

a control component configured to control a plurality of regulators; and

feedback circuitry configured to:

receive output voltages of the plurality of regulators as respective inputs; and

provide feedback signals to the control component, wherein the feedback signals indicate whether the respective output voltages have reached respective threshold voltage levels corresponding to a first operation state; and

wherein the control component is configured to:

allow the plurality of regulators to increase voltage levels of the output voltages responsive to the respective output voltages being determined to have reached the respective threshold voltage levels; and

delay allowing the plurality of regulators to increase voltage levels of the output voltages responsive to the respective output voltages being determined to have not reached the respective threshold voltage levels.

11. The power management component of claim 10 , wherein the respective output voltages of the plurality of regulators correspond to respective supply voltage rails used in a solid state drive.

12. The power management component of claim 10 , wherein:

the first operation state corresponds to a reduced power state; and

the control component is configured to allow, responsive to the respective output voltages being determined to have reached the respective threshold voltage levels, the plurality of regulators to increase the voltage levels of the output voltages to respective voltage levels corresponding to an active state.

13. The power management component of claim 10 , wherein the control component is configured to independently monitor bleed voltage levels respectively corresponding to the respective output voltages of the plurality of regulators.

14. The power management component of claim 10 , wherein the first operation state is a sleep state, a standby state, or an off state.

15. The power management component of claim 10 , wherein one or more regulators of the plurality of regulators are coupled to one or more bleed resistors that are configured to discharge a voltage on a respective conductive line coupled to the one or more regulators.

16. A power management component, comprising:

a plurality of regulators configured to provide respective output voltages based on different respective operation states of the power management component; and

a control component coupled to the plurality of regulators, the control component configured to:

responsive to the respective output voltage of at least one of the plurality of regulators being determined to have reached a respective threshold voltage level corresponding to a current operation state, allow an operation state change of the power management component by allowing the plurality of regulators to output increased voltages; and

responsive to the respective output voltage of at least one of the plurality of regulators being determined to have not yet reached the respective threshold voltage level corresponding to the current operation state, prevent the operation state change of the power management component.

17. The power management component of claim 16 , wherein the operation state change comprises a change from a reduced power state to an active state of a memory sub-system.

18. The power management component of claim 16 , wherein the control component is configured to compare the respective output voltage of the at least one of the plurality of regulator to the respective threshold voltage level using one or more comparators.

19. The power management component of claim 16 , wherein the control component is configured to compare the respective output voltage of the at least one of the plurality of regulator to the respective threshold voltage level using one or more comparators.

20. The power management component of claim 16 , wherein one or more regulators of the plurality of regulators are coupled to the control component via one or more general-purpose input output (GPIO) pins.