IP Library › Granted Patent US 12,657,359
Granted Patent B2
US 12,657,359 · App. 17/903,146 · Granted Jun 16, 2026

Quantum computing system based on quantum dot qubits and operation method thereof

Inventors: Chungheon Baek (Daejeon, KR); Byung-Soo Choi (Daejeon, KR); Taewan Kim (Daejeon, KR); Yongsoo Hwang (Daejeon, KR)
Assignee: Electronics and Telecommunications Research Institute
G06F30/327G06N10/40G06N10/80
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Quick Facts
Patent No.
US 12,657,359
App. No.
17/903,146
Granted
Jun 16, 2026
Kind
B2
Abstract

Disclosed is a quantum computing system including an input processing unit that performs a quantum dot qubit-based quantum computing operation based on a user input algorithm and input data including information for controlling an operation, and converts the user input algorithm into a gate-based transformation algorithm, an algorithm decomposition unit that generates an equivalent circuit corresponding to the transformation algorithm, a quantum circuit mapping unit that generates a modified equivalent circuit by rearranging qubits constituting the equivalent circuit, a driving signal generation unit that generates a driving signal for controlling the modified equivalent circuit, a computing execution unit that performs the quantum computing operation by applying the driving signal to the modified equivalent circuit and generates computing data, and an output unit that converts the computing data into logical data and outputs the logical data as result data.

Claims (43)

1 . A quantum computing system performing a quantum dot qubit-based quantum computing operation based on a user input algorithm and input data including information for controlling an operation, the system comprising:

an input processing unit configured to convert the user input algorithm into a gate-based transformation algorithm;

an algorithm decomposition unit configured to generate an equivalent circuit corresponding to the transformation algorithm;

a quantum circuit mapping unit configured to generate a modified equivalent circuit by rearranging qubits constituting the equivalent circuit;

a driving signal generation unit configured to generate a driving signal for controlling the modified equivalent circuit;

a computing execution unit configured to perform the quantum computing operation by applying the driving signal to the modified equivalent circuit and to generate computing data; and

an output unit configured to convert the computing data into logical data and to output the logical data as result data,

wherein the quantum circuit mapping unit generates the modified equivalent circuit based on control structure and feature information included in the input data, and

wherein the control structure and feature information includes a connection structure of a quantum gate in which an operation is possible, a coherence time of a quantum dot qubit, and an operating time and accuracy of a quantum gate.

2 . The system of claim 1 , wherein the user input algorithm is programmed in units of gate based on quantum assembly (QASM).

3 . The system of claim 1 , wherein the algorithm decomposition unit generates the equivalent circuit based on gate configuration information included in the input data, and

wherein the gate configuration information includes information about gates corresponding to the user input algorithm and information about gates, each of which is capable of performing a quantum dot qubit-based operation.

4 . The system of claim 3 , wherein the transformation algorithm includes a 1-qubit gate or a multi-qubit gate as an input circuit, and

wherein the algorithm decomposition unit decomposes the 1-qubit gate included in the input circuit into a plurality of 1-qubit gates, and decomposes the multi-qubit gate included in the input circuit into a 1-qubit gate or a 2-qubit gate.

5 . The system of claim 4 , wherein the 1-qubit gate includes a S gate, a T gate, an R x gate, an R y gate, and an R z gate, and the multi-qubit gate includes a CNOT gate, a SWAP gate, a Toffoli gate, a C-Phase gate, and a Controlled-Z gate.

6 . The system of claim 1 , wherein the quantum circuit mapping unit rearranges the qubits depending on an operating speed and accuracy of each of the qubits.

7 . The system of claim 1 , wherein the driving signal is a quantum gate signal capable of being applied to each quantum dot of the modified equivalent circuit.

8 . The system of claim 7 , wherein the driving signal is used to cancel an error related to an operation of the modified equivalent circuit by simultaneously controlling a plurality of gates included in a qubit of the modified equivalent circuit and to attenuate external noise by searching for a point having few errors according to a spin and a charge in the modified equivalent circuit.

9 . The system of claim 1 , wherein the computing execution unit provides a quantum dot qubit controller, which applies a quantum gate to the system, with the modified equivalent circuit and information related to the driving signal such that the driving signal is applied to the modified equivalent circuit.

10 . The system of claim 1 , wherein the output unit converts the computing data into the logical data based on predefined logical signal information, and

wherein the result data further includes an accuracy of the quantum computing operation, a speed of the quantum computing operation, and whether a result of the quantum computing operation is within an error range.

11 . An operating method of a quantum computing system performing a quantum dot qubit-based quantum computing operation based on a user input algorithm and input data including information for controlling an operation, the method comprising:

converting the user input algorithm into a gate-based transformation algorithm;

generating an equivalent circuit corresponding to the transformation algorithm;

generating a modified equivalent circuit by rearranging qubits constituting the equivalent circuit;

generating a driving signal for controlling the modified equivalent circuit;

performing the quantum computing operation by applying the driving signal to the modified equivalent circuit and generating computing data; and

converting the computing data into logical data and outputting the logical data as result data,

wherein the generating of the modified equivalent circuit includes:

generating the modified equivalent circuit based on control structure and feature information included in the input data, and

wherein the control structure and feature information includes a connection structure of a quantum gate in which an operation is possible, a coherence time of a quantum dot qubit, and an operating time and accuracy of a quantum gate.

12 . The method of claim 11 , wherein the generating of the equivalent circuit includes:

generating the equivalent circuit based on gate configuration information included in the input data, and

wherein the gate configuration information includes information about gates corresponding to the user input algorithm and information about gates, each of which is capable of performing a quantum dot qubit-based operation.

13 . The method of claim 11 , wherein the generating of the modified equivalent circuit based on the control structure and feature information includes:

rearranging the qubits depending on an operating speed and accuracy of each of the qubits.

14 . The method of claim 11 , wherein the driving signal is a quantum gate signal capable of being applied to each quantum dot of the modified equivalent circuit, further comprising:

canceling an error related to an operation of the modified equivalent circuit by simultaneously controlling a plurality of gates included in a qubit of the modified equivalent circuit; and

attenuating external noise by searching for a point having few errors according to a spin and a charge in the modified equivalent circuit.

15 . The method of claim 11 , wherein the generating of the computing data includes:

providing a quantum dot qubit controller, which applies a quantum gate to the system, with the modified equivalent circuit and information related to the driving signal such that the driving signal is applied to the modified equivalent circuit.

16 . The method of claim 11 , wherein the outputting of the logical data as result data includes:

converting the computing data into the logical data based on predefined logical signal information, and wherein the result data further includes an accuracy of the quantum computing operation, a speed of the quantum computing operation, and whether a result of the quantum computing operation is within an error range.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2022
From: BAEK, CHUNGHEON; CHOI, BYUNG-SOO; KIM, TAEWAN; HWANG, YONGSOO
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 060994/0565 →
Priority Claims (2)
KR 10-2021-0130244 · Sep 30, 2021 · national
KR 10-2022-0099401 · Aug 9, 2022 · national
Continuity (1)
Related Publication 20230097026A1 · Mar 30, 2023
References Cited (24)
US 7453162B2 · Freedman et al. · 2008 [cited by applicant]
US 8671369B2 · Ahn · 2014 [cited by examiner]
US 10922457B2 · Nam et al. · 2021 [cited by applicant]
US 12443869B2 · Griffin · 2025 [cited by examiner]
US 20060123363A1 · Williams · 2006 [cited by examiner]
US 20180013426A1 · Deurloo et al. · 2018 [cited by applicant]
US 20190194016A1 · Roberts et al. · 2019 [cited by applicant]
US 20190244128A1 · Choi et al. · 2019 [cited by applicant]
US 20190332731A1 · Chen et al. · 2019 [cited by applicant]
US 20190393398A1 · Leipold et al. · 2019 [cited by applicant]
US 20200218842A1 · Itoko · 2020 [cited by examiner]
US 20200334563A1 · Gambetta · 2020 [cited by examiner]
US 20200342344A1 · Gambetta · 2020 [cited by examiner]
US 20200364600A1 · Elsherbini et al. · 2020 [cited by applicant]
US 20200412531A1 · Kim et al. · 2020 [cited by applicant]
US 20210233957A1 · Tsai et al. · 2021 [cited by applicant]
US 20220027323A1 · Coady · 2022 [cited by examiner]
US 20220284339A1 · Wang · 2022 [cited by examiner]
US 20240119329A1 · Dou · 2024 [cited by examiner]
US 20250298993A1 · Lu · 2025 [cited by examiner]
KR 1020200101333A · 2020 [cited by applicant]
Korean Office Action on Jul. 3, 2025 in corresponding Korean Patent Application No. 10-2022-0099401 (7 pages in Korean). [cited by applicant]
Korean Office Action Issued on Apr. 23, 2025, in Counterpart Korean Patent Application No. 10-2022-0099401 (8 Pages in English, 8 Pages in Korean). [cited by applicant]
Veldhorst, M., et al. “Silicon CMOS architecture for a spin-based quantum computer.” [cited by applicant]