Temperature compensated MTJ-based sensing circuit for measuring an external magnetic field

1. MTJ sensing circuit for measuring an external magnetic field and comprising a plurality of MTJ sensor elements connected in a bridge configuration, the MTJ sensing circuit having an input for inputting a bias voltage and generating an output voltage proportional to the external magnetic field multiplied by the bias voltage and a gain sensitivity of the MTJ sensing circuit, wherein the gain sensitivity and the output voltage vary with temperature;

the MTJ sensing circuit further comprising a temperature compensation circuit configured to provide a modulated bias voltage that varies as a function of temperature over a temperature range, such that the output voltage is substantially constant as a function of temperature;

wherein the temperature compensation circuit is configured for generating a plurality of reference voltages, each reference voltage corresponding to a temperature subrange of the temperature range;

wherein the temperature compensation circuit further comprises a plurality of subrange resistors configured to generate a temperature dependent voltage for each subrange resistor, when a temperature dependent proportional-to-absolute-temperature (PTAT) current is forced in the plurality of subrange resistors;

the temperature compensation circuit further comprises a plurality of comparators configured to compare temperature dependent voltages to a plurality of fixed voltage references, each comparator generating a hysteresis comparator output;

the temperature compensation circuit further comprises an array-based memory cell having a plurality of registers, each register representing a bias voltage corresponding to one of the temperature subranges, the array-based memory cell being configured to select one of the register depending on the hysteresis comparator output.

2. The MTJ sensing circuit according to claim 1 , wherein the temperature compensation circuit comprises a temperature sensor circuit configured for measuring said gain sensitivity over said temperature range.

3. The MTJ sensing circuit according to claim 1 , wherein each temperature subrange has a temperature span of about 10° C. or larger.

4. The MTJ sensing circuit according to claim 1 , wherein said temperature range extends from −40° C. to 125° C.

5. The MTJ sensing circuit according to claim 1 , wherein said temperature subranges comprise a temperature subrange below 25° C. and a temperature subrange from 25° C. or above.

6. Method for compensating an output voltage of a MTJ sensing circuit comprising a plurality of MTJ sensor elements connected in a bridge configuration, the MTJ sensing circuit having an input for inputting a bias voltage and generating an output voltage proportional to the external magnetic field multiplied by the bias voltage and a gain sensitivity of the MTJ sensing circuit, wherein the gain sensitivity and the output voltage vary with temperature; the MTJ sensing circuit further comprising a temperature compensation circuit configured to provide a modulated bias voltage that varies as a function of temperature over a temperature range;

wherein the temperature compensation circuit further comprises a plurality of subrange resistors configured to pass a PTAT current, a plurality of comparators, and an array-based memory cell having a plurality of registers, each register representing a bias voltage corresponding to one of the temperature subranges;

the method comprising:

measuring temperature of the MTJ sensing circuit;

using the temperature compensation circuit to modulate the bias voltage with temperature such that the modulated bias voltage multiplied by the gain sensitivity is constant; comprising:

using the temperature compensation circuit to generate a plurality of reference voltages, each reference voltage corresponding to a temperature subrange of the temperature range;

generating a temperature dependent voltage for each subrange resistor, by forcing the PTAT current in the plurality of subrange resistors;

using the plurality of comparators to compare temperature dependent voltages to a plurality of fixed voltage references, and generating a hysteresis comparator output for each comparator; and

using the array-based memory cell to select one of the register depending on the hysteresis comparator output.