IP Library › Granted Patent US 12,626,176
Granted Patent B2
US 12,626,176 · App. 17/913,548 · Granted May 12, 2026

Systems and methods for scalable quantum computing

Inventor: Richard G. Harris (North Vancouver, CA)
Assignee: D-WAVE SYSTEMS INC.
G06N10/40H10N60/12
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Quick Facts
Patent No.
US 12,626,176
App. No.
17/913,548
Granted
May 12, 2026
Kind
B2
Abstract

A superconducting circuit includes four superconducting qubits communicatively coupled by a 4-qubit even-parity stabilizer. The 4 -qubit even-parity stabilizer includes a superconducting stabilizer loop, and four inductances, each inductance inductively communicatively coupled to an inductance of a respective one of the four superconducting qubits. The 4-qubit even-parity stabilizer also includes a parity-enforcing super-conducting qubit communicatively coupled to the superconducting loop. A quantum processor comprises four Josephson parametric amplifiers communicatively coupled by a 4-qubit even-parity stabilizer. The Josephson parametric amplifiers comprise pairs of superconducting microwave resonators communicatively coupled by a compound-compound Josephson junction. The 4-qubit even-parity stabilizer includes a superconducting loop, four inductances inductively communicatively coupled to an inductance of a respective one of the four Josephson parametric amplifier, and a parity-enforcing Josephson parametric amplifier communicatively coupled to the superconducting loop.

Claims (17)

1 . A quantum processor comprising a first, a second, a third, and a fourth Josephson parametric amplifier, wherein the first, the second, the third, and the fourth parametric amplifiers are communicatively coupled to one another by a 4 -qubit even- parity stabilizer, the 4-qubit even-parity stabilizer comprising:

a superconducting loop, the superconducting loop which includes a material that is superconducting at or below a critical temperature, the superconducting loop which includes a crossover;

a first, a second, a third, and a fourth inductance of the superconducting loop, each of the first, the second, the third, and the fourth inductance inductively communicatively coupled to an inductance of a respective Josephson parametric amplifier; and

a parity-enforcing Josephson parametric amplifier, wherein the parity-enforcing Josephson parametric amplifier is communicatively coupled to the superconducting loop.

2 . The quantum processor of claim 1 , wherein each of the first, the second, the third, and the fourth Josephson parametric amplifiers comprises a respective pair of superconducting microwave resonators, each superconducting microwave resonator of the respective pair of superconducting microwave resonators communicatively coupled to each other by a compound-compound Josephson junction.

3 . The quantum processor of claim 2 , wherein each of the first, the second, the third and the fourth Josephson parametric amplifiers comprises:

a respective compound-compound Josephson junction; and

a respective first control circuit communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers, wherein each respective first control circuit comprises:

an analog direct current (DC current) bias, the analog DC current bias communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers;

a digital-to-analog converter (DAC), the DAC communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers; and

a respective first microwave drive communicatively coupled to a respective first tunable mutual inductance, wherein the respective first tunable mutual inductance is communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers.

4 . The quantum processor of claim 3 , wherein the respective first tunable mutual inductance of each of the respective first control circuit is inductively communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers and each of the analog DC current bias and each of the DAC of the respective first control circuit are inductively communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers.

5 . The quantum processor of claim 3 , wherein each respective first control circuit is operable to control strengths of X-terms and Z-terms of an effective Hamiltonian via a resonant drive at a first angular frequency, and via a parametric drive at a second angular frequency, the second angular frequency equal to a difference between twice the first angular frequency and a time-dependent de-tuning frequency.

6 . The quantum processor of claim 3 , wherein each of the first, the second, the third and the fourth Josephson parametric amplifiers further comprises a respective second control circuit, each respective second control circuit comprising a respective second microwave drive communicatively coupled to a respective second tunable mutual inductance, wherein each respective second tunable mutual inductance is communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers.

7 . The quantum processor of claim 6 , wherein each respective second tunable mutual inductance of the respective second control circuit is inductively communicatively coupled to the respective compound-compound Josephson junction of the first, the second, the third and the fourth Josephson parametric amplifiers.

8 . The quantum processor of claim 6 , wherein each respective first and second tunable mutual inductance comprises a superconducting loop interrupted by a compound Josephson junction.

9 . The quantum processor of claim 2 , wherein each of the superconducting microwave resonators in the respective pair of superconducting resonators of the first, the second, the third, and the fourth Josephson parametric amplifiers is one of: a coaxial transmission line resonator, and a ladder circuit comprising a plurality of inductor-capacitor (LC) circuits electrically communicatively coupled in series with one another.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2025
From: PSPIB UNITAS INVESTMENTS II INC.
To: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
Reel/Frame 070470/0098 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Apr 14, 2023
From: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
To: PSPIB UNITAS INVESTMENTS II INC., AS COLLATERAL AGENT
Reel/Frame 063340/0888 →
Continuity (2)
Provisional Application 63001014 · Mar 27, 2020
Related Publication 20230106489A1 · Apr 6, 2023
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