IP Library › Granted Patent US 12,446,250
Granted Patent B2
US 12,446,250 · App. 17/921,225 · Granted Oct 14, 2025

Normally-off mode polarization super junction GaN-based field effect transistor and electrical equipment

Inventors: Hiroji Kawai (Oyama, JP); Shuichi Yagi (Oyama, JP); Hironobu Narui (Oyama, JP)
Assignee: POWDEC K.K.
H10D30/4732H10D8/422H10D30/015H10D62/124H10D64/411H10D64/512H10D62/824H10D62/8503
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Quick Facts
Patent No.
US 12,446,250
App. No.
17/921,225
Granted
Oct 14, 2025
Kind
B2
Abstract

This normally-off mode polarization super junction GaN-based FET has an undoped GaN layer 11 , an Al x Ga 1-x N layer 12 , an island-like undoped GaN layer 13 , a p-type GaN layer 14 and a p-type In y Ga 1-y N layer 15 which are stacked in order. The FET has a gate electrode 16 on the uppermost layer, a source electrode 17 and a drain electrode 17 on the Al x Ga 1-x N layer 12 and a p-type In z Ga 1-z N layer 19 and a gate electrode 20 which are located beside one end of the undoped GaN layer 13 on the Al x Ga 1-x N layer 12 . The gate electrode 20 may be provided on the p-type In z Ga 1-z N layer 19 via a gate insulating film. At a non-operating time, n 0 ≤n 1 <n 2 <n 3 is satisfied for the concentration n 0 of the 2DEG 22 formed in the undoped GaN layer 11 /the Al x Ga 1-x N layer 12 hetero-interface just below the gate electrode 20 , the concentration n 1 of the 2DEG 22 just below the gate electrode 16 , the concentration n 2 of the 2DEG 22 in the polarization super junction region and the concentration n 3 of the 2DEG 22 in the part between the polarization super junction region and the drain electrode 18.

Claims (46)

1. A normally-off mode polarization super junction GaN-based field effect transistor, comprising:

a first undoped GaN layer,

an Al x Ga 1-x N layer (0<x<1) on the first undoped GaN layer,

a second undoped GaN layer having an island-like shape on the Al x Ga 1-x N layer,

a p-type GaN layer on the second undoped GaN layer,

a p-type In y Ga 1-y N layer (0<y<1) on the p-type GaN layer,

a source electrode on the Al x Ga 1-x N layer,

a drain electrode on the Al x Ga 1-x N layer,

a first gate electrode electrically connected to the p-type In y Ga 1-y N layer; and

a p-type In z Ga 1-z N layer (0<z<1) and a second gate electrode thereon on the Al x Ga 1-x N layer which are located beside one end of the second undoped GaN layer on the side of the source electrode,

the Al x Ga 1-x N layer having a protrusion having an island-like shape as the same as the second undoped GaN layer on an upper part just below the second undoped GaN layer, the p-type In z Ga 1-z N layer and the second gate electrode being provided on a flat upper surface of a part of the Al x Ga 1-x N layer which is located beside the protrusion,

the first gate electrode and the second gate electrode being provided independently each other,

the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode,

the p-type In y Ga 1-y N layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode,

n 0 ≤n 1 <n 2 <n 3 and n 0 <( 1/1000)×n 3

being satisfied at a non-operating time if the concentration of a two-dimensional electron gas formed in the first undoped GaN layer in the vicinity part of a hetero-interface between the first undoped GaN layer and the Al x Ga 1-x N layer just below the second gate electrode is denoted as n 0 , the concentration of the two-dimensional electron gas just below the first gate electrode is denoted as n 1 , the concentration of the two-dimensional electron gas in a polarization super junction region is denoted as n 2 and the concentration of the two-dimensional electron gas in a part between the polarization super junction region and the drain electrode is denoted as n 3 ,

p 1 >p 2

being satisfied if the concentration of a two-dimensional hole gas formed in the second undoped GaN layer in the vicinity part of a hetero-interface between the second undoped GaN layer and the Al x Ga 1-x N layer just below the first gate electrode is denoted as p 1 and the concentration of the two-dimensional hole gas in the polarization super junction region is denoted as p 2 .

2. The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the In composition y and the thickness t of the p-type In y Ga 1-y N layer are selected to satisfy y×t≤0.20×5 [nm] and the In composition z and the thickness t of the p-type In z Ga 1-z N layer are selected to satisfy z×t≤0.20×5 [nm].

3. The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the first gate electrode and the second gate electrode are electrically connected each other and act as one gate electrode.

4. The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the first gate electrode and the source electrode are electrically connected each other and the first gate electrode acts as a field plate.

5. The normally-off mode polarization super junction GaN-based field effect transistor according to claim 4 wherein the first gate electrode is fixed to a positive potential with respect to the potential of the source electrode.

6. The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the first gate electrode, the second gate electrode and the source electrode are electrically connected each other and the transistor operates as a diode.

7. The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the second gate electrode is provided on the p-type In z Ga 1-z N layer via a gate insulating film.

8. Electrical equipment, comprising:

at least a transistor,

the transistor being

a normally-off mode polarization super junction GaN-based field effect transistor, comprising:

a first undoped GaN layer,

an Al x Ga 1-x N layer (0<x<1) on the first undoped GaN layer,

a second undoped GaN layer having an island-like shape on the Al x Ga 1-x N layer,

a p-type GaN layer on the second undoped GaN layer,

a p-type In y Ga 1-y N layer (0<y<1) on the p-type GaN layer,

a source electrode on the Al x Ga 1-x N layer,

a drain electrode on the Al x Ga 1-x N layer,

a first gate electrode electrically connected to the p-type In y Ga 1-y N layer; and

a p-type In z Ga 1-z N layer (0<z<1) and a second gate electrode thereon on the Al x Ga 1-x N layer which are located beside one end of the second undoped GaN layer on the side of the source electrode,

the Al x Ga 1-x N layer having a protrusion having an island-like shape as the same as the second undoped GaN layer on an upper part just below the second undoped GaN layer, the p-type In z Ga 1-z N layer and the second gate electrode being provided on a flat upper surface of a part of the Al x Ga 1-x N layer which is located beside the protrusion,

the first gate electrode and the second gate electrode being provided independently each other,

the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode,

the p-type In y Ga 1-y N layer existing on one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode,

n 0 ≤n 1 <n 2 <n 3 and n 0 <( 1/1000)×n 3

being satisfied at a non-operating time if the concentration of a two-dimensional electron gas formed in the first undoped GaN layer in the vicinity part of a hetero-interface between the first undoped GaN layer and the Al x Ga 1-x N layer just below the second gate electrode is denoted as n 0 , the concentration of the two-dimensional electron gas just below the first gate electrode is denoted as n 1 , the concentration of the two-dimensional electron gas in a polarization super junction region is denoted as n 2 and the concentration of the two-dimensional electron gas in a part between the polarization super junction region and the drain electrode is denoted as n 3 ,

p 1 >p 2

being satisfied if the concentration of a two-dimensional hole gas formed in the second undoped GaN layer in the vicinity part of a hetero-interface between the second undoped GaN layer and the Al x Ga 1-x N layer just below the first gate electrode is denoted as p 1 and the concentration of the two-dimensional hole gas in the polarization super junction region is denoted as p 2 .

9. The electrical equipment according to claim 8 wherein the second gate electrode of the normally-off mode polarization super junction GaN-based field effect transistor is provided on the p-type InzGa1-zN layer via a gate insulating film.

Assignments (2)
MERGER Recorded Dec 2, 2025
From: POWDEC K.K.
To: SANKEN ELECTRIC CO., LTD.
Reel/Frame 073089/0248 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2022
From: KAWAI, HIROJI; YAGI, SHUICHI; NARUI, HIRONOBU
To: POWDEC K. K.
Reel/Frame 061531/0840 →
Priority Claims (2)
JP 2021-038916 · Mar 11, 2021 · national
JP 2021-143739 · Sep 3, 2021 · national
Continuity (1)
Related Publication 20230170407A1 · Jun 1, 2023
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