Granted Patent B2

US 12,242,833 · App. 17/929,522 · Granted Mar 4, 2025

Inventor: Michael Ian Ferguson (Pine Mountain Club, CA)

Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGY

G06F8/447G06F8/4441G06F11/3696

Abstract

Claims (67)

1. A computer-implemented method for compiling computer code, comprising:

(a) obtaining source code;

(b) pre-processing the source code to generate pure source code, wherein the pure source code comprises definitions required for interpretation of the source code;

(c) formalizing, in a compiler, the pure source code into assembly language that is processor specific, wherein the formalizing comprises:

(i) determining a set of two or more optimization routines;

(ii) randomly selecting multiple selected optimization routines from the set of two or more optimization routines, wherein the random selection improves resistance to software subversion; and

(iii) applying the multiple selected optimization routines to each segment of the pure source code; and

(d) outputting an executable binary file based on the formalized pure source code, wherein the executable binary file has an improved resistance to software subversion.

2. The computer-implemented method of claim 1 , wherein the randomly selecting comprises:

determining a cost for each of the two or more optimization routines in the set;

determining a subset of two or more optimization routines from the set of the two or more optimization routines, wherein the subset comprises optimization routines whose costs are within a predefined threshold; and

randomly selecting the multiple selected optimization routines from the subset.

3. The computer-implemented method of claim 2 , wherein the random selection is based on a variance of all of the costs.

4. The computer-implemented method of claim 1 , wherein the formalizing further comprises:

determining that the multiple selected optimization routines allocate memory;

scaling up the memory allocation by a predefined percentage; and

creating an implementation for the multiple selected optimization routines with the scaled up memory allocation.

5. The computer-implemented method of claim 1 , wherein the formalizing further comprises:

determining that the compiling is performed in a multi-processor shared-memory computer wherein multiple processors share a memory cache;

arbitrarily invalidating cache lines in the memory cache.

6. The computer-implemented method of claim 1 , wherein:

the pre-processing further comprises defining a pre-processor directive that directs different code blocks of the pure source code to be written into different memory blocks;

the compiling further comprises debugging the source code based on the different memory blocks.

7. The computer-implemented method of claim 1 , wherein the formalizing further comprises:

specifying, via a binary code, an on/off behavior of each of the two or more optimization routines.

8. The computer-implemented method of claim 7 , wherein the binary code is set forth in a global variable with each bit of the global variable corresponding to one of the optimization routines.

9. The computer-implemented method of claim 8 , further comprising:

providing the global variable to a hypervisor;

the hypervisor modifying, via the global variable, an operational parameter of the computer code.

10. The computer-implemented method of claim 9 , further comprising:

the hypervisor observing when the computer code is calling a same piece of memory at a frequency that is suboptimal for a given architecture and does not map to a proper application of the two or more optimization routines;

wherein the hypervisor modifies the global variable resulting in a different application of the two or more optimization routines.

11. A computer-implemented system for compiling computer code, comprising:

(a) a computer having a memory;

(b) a processor executing on the computer; and

(c) the memory storing a set of instructions, wherein the set of instructions, when executed by the processor cause the processor to perform operations comprising:

(i) obtaining source code;

(ii) pre-processing the source code to generate pure source code, wherein the pure source code comprises definitions required for interpretation of the source code;

(iii) formalizing, in a compiler, the pure source code into assembly language that is processor specific, wherein the formalizing comprises:

(A) determining a set of two or more optimization routines;

(B) randomly selecting multiple selected optimization routines from the set of two or more optimization routines, wherein the random selection improves resistance to software subversion; and

(C) applying the multiple selected optimization routines to each segment of the pure source code; and

(iv) outputting an executable binary file based on the formalized pure source code, wherein the executable binary file has an improved resistance to software subversion.

12. The computer-implemented system of claim 11 , wherein the randomly selecting comprises:

determining a cost for each of the two or more optimization routines in the set;

determining a subset of two or more optimization routines from the set of the two or more optimization routines, wherein the subset comprises optimization routines whose costs are within a predefined threshold; and

randomly selecting the multiple selected optimization routines from the subset.

13. The computer-implemented system of claim 12 , wherein the random selection is based on a variance of all of the costs.

14. The computer-implemented system of claim 11 , wherein the formalizing further comprises:

determining that the multiple selected optimization routines allocates memory;

scaling up the memory allocation by a predefined percentage; and

creating an implementation for the multiple selected optimization routines with the scaled up memory allocation.

15. The computer-implemented system of claim 11 , wherein the formalizing further comprises:

determining that the compiling is performed in a multi-processor shared-memory computer wherein multiple processors share a memory cache;

arbitrarily invalidating cache lines in the memory cache.

16. The computer-implemented system of claim 11 , wherein:

the pre-processing further comprises defining a pre-processor directive that directs different code blocks of the pure source code to be written into different memory blocks;

the compiling further comprises debugging the source code based on the different memory blocks.

17. The computer-implemented system of claim 11 , wherein the formalizing further comprises:

specifying, via a binary code, an on/off behavior of each of the two or more optimization routines.

18. The computer-implemented system of claim 17 , wherein the binary code is set forth in a global variable with each bit of the global variable corresponding to one of the optimization routines.

19. The computer-implemented system of claim 18 , wherein the operations further comprise:

providing the global variable to a hypervisor;

the hypervisor modifying, via the global variable, an operational parameter of the computer code.

20. The computer-implemented system of claim 19 , wherein the operations further comprise:

the hypervisor observing when the computer code is calling a same piece of memory at a frequency that is suboptimal for a given architecture and does not map to a proper application of the two or more optimization routines;

wherein the hypervisor modifies the global variable resulting in a different application of the two or more optimization routines.

Assignments (1)

Continuity (3)

References Cited (9)