Low stress asymmetric dual side module

1. A method of forming semiconductor packages, the method comprising:

providing a first panel of a plurality of first substrates and a second panel of a plurality of second substrates;

printing a first electrically conductive bonding material on a first side of each of the first panel of the plurality of first substrates and a second side of the plurality of second substrates in predetermined locations;

coupling two or more die to each of the first panel of the plurality of first substrates and the second panel of the plurality of second substrates at the predetermined locations;

dispensing a second electrically conductive material onto a second side of each of the two or more die;

coupling a clip to each of the two or more die;

electrically coupling the two or more die to each of the plurality of first substrates and each of the plurality of second substrates;

singulating the first panel and the second panel each into the plurality of first substrates and the plurality of second substrates, respectively;

dispensing solder onto a plurality of predetermined locations on a first side of each of the first substrates and the second substrates;

coupling a first substrate of the plurality of first substrates to a first side of a lead frame; and

coupling a first side of a second substrate of the plurality of second substrates to a second side of the lead frame.

2. The method of claim 1 , further comprising trimming the lead frame to expose a plurality of leads and forming the plurality of leads.

3. The method of claim 1 , further comprising encapsulating the lead frame on the first side and the second side, wherein a second side of each of the first substrate and the second substrate is exposed.

4. The method of claim 1 , wherein the first substrate and the second substrate comprise one of a direct bonded copper substrate (DBC), an insulated metal substrate technology (IMST) substrate, an active metal bonding (AMB) substrate, or any combination thereof.

5. The method of claim 1 , further comprising coupling a heat sink with one of the second side of the first substrate, the second side of the second substrate, or any combination thereof.

6. The method of claim 1 , further comprising coupling one or more leads with a cross sectional shape to provide separation between the first substrate and the second substrate.

7. The method of claim 1 , wherein the first side of the first substrate and first side of the second substrate are asymmetrically coupled through the lead frame.

8. A method of forming a semiconductor package, the method comprising:

coupling a first substrate to a lead frame;

coupling a second substrate to the lead frame, wherein the lead frame is coupled between the first substrate and the second substrate upon coupling the second substrate to the lead frame; and

partially encapsulating the lead frame in a molding compound;

wherein a perimeter of the first substrate only partially overlaps a perimeter of the second substrate and the perimeter of the second substrate only partially overlaps the perimeter of the first substrate when the first substrate and second substrate are coupled through the lead frame.

9. The method of claim 8 , wherein only a portion of the first substrate is coupled directly under the second substrate and only a portion of the second substrate is coupled directly over the first substrate.

10. The method of claim 8 , further comprising coupling a heat sink with one of the first substrate, the second substrate, or any combination thereof.

11. The method of claim 8 , further comprising coupling one or more leads with a cross sectional shape that provides separation between the first substrate and the second substrate.

12. The method of claim 11 , wherein the cross sectional shape comprises one of a C-shape or an S-shape.

13. The method of claim 11 , wherein the one or more leads is directly coupled to a terminal of the first substrate and a terminal of the second substrate and wherein the terminal of the first substrate is aligned with the terminal of the second substrate.

14. The method of claim 11 , wherein the one or more leads is directly coupled to a terminal of the first substrate and a terminal of the second substrate and wherein the terminal of the first substrate is misaligned with the terminal of the second substrate.

15. A method of forming a semiconductor package, the method comprising:

asymmetrically coupling a first substrate to a second substrate through a lead frame between the first substrate and the second substrate; and

at least partially encapsulating the lead frame in a molding compound;

wherein a perimeter of a first side of the first substrate extends outside of a perimeter of a first side of the second substrate and the perimeter of the first side of the second substrate extends outside of the perimeter of the first side of the first substrate, wherein the first side of the first substrate faces the first side of the second substrate.

16. The method of claim 15 , further comprising coupling a plurality of clips to the first substrate and the second substrate.

17. The method of claim 15 , further comprising coupling one or more leads with a cross sectional shape that provides separation between the first substrate and the second substrate.

18. The method of claim 17 , wherein the cross sectional shape comprises one of a C-shape or an S-shape.

19. The method of claim 17 , wherein the one or more leads is directly coupled to a terminal of the first substrate and a terminal of the second substrate and wherein the terminal of the first substrate is aligned with the terminal of the second substrate.