IP Library Granted Patent US 11,855,524
Granted Patent B2
US 11,855,524 · App. 17/933,597 · Granted Dec 26, 2023

Gate driver circuit for a power supply voltage converter

Inventors: Robert Ryan (Cork, IE); Diarmuid Hogan (Denver, CO)
Assignee: AES Global Holdings PTE Ltd.
H02M1/08H02M3/156
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Quick Facts
Patent No.
US 11,855,524
App. No.
17/933,597
Granted
Dec 26, 2023
Kind
B2
Abstract

A gate driver circuit comprises an auxiliary winding, a voltage summer, an auxiliary voltage bus, a gate driver integrated circuit (IC), and a controller. The auxiliary winding is positioned adjacently to the inductor and configured to inductively couple with the inductor. The voltage summer comprises a pair of diodes coupled to the auxiliary winding and a pair of capacitors coupled to the pair of diodes. The auxiliary voltage bus is configured to receive a summed voltage from the voltage summer based on a sum of voltages stored in the pair of capacitors. The gate driver IC is configured to receive a voltage from a positive rail of the auxiliary voltage bus and to output a gate control signal to control a switching device based on the received voltage and based on a pulse signal generated by the controller.

Claims (79)

1. A voltage converter comprising:

a transformer comprising:

a primary winding; and

a secondary winding inductively coupleable with the primary winding;

a voltage summer comprising:

a first diode coupled to the secondary winding;

a second diode coupled to the secondary winding;

a first capacitor coupled to the first diode; and

a second capacitor coupled to the second diode;

an auxiliary voltage bus coupled with the voltage summer;

a controller configured to generate a pulse signal;

a gate driver integrated circuit (IC) comprising:

a voltage input coupled to the auxiliary voltage bus; and

a logic input configured to receive the pulse signal;

wherein the gate driver IC is configured to control a conducting state of a switching device based on a summed voltage and based on the pulse signal.

2. The voltage converter of claim 1 , wherein the voltage input is coupled to a positive rail of the auxiliary voltage bus.

3. The voltage converter of claim 2 , wherein the auxiliary bus is configured to receive the summed voltage from the voltage summer based on a sum of voltages stored in the first and second capacitors.

4. The voltage converter of claim 3 , wherein the secondary winding comprises a center-tapped winding having a center tap;

wherein a first auxiliary winding is formed between a first end of the secondary winding and the center tap; and

wherein a second auxiliary winding is formed between a second end of the secondary winding and the center tap.

5. The voltage converter of claim 4 , wherein:

the first diode is coupled between the first end of the first auxiliary winding and a first terminal of the first capacitor;

the second diode is coupled between the second end of the first auxiliary winding and a first terminal of the second capacitor; and

a second terminal of the first capacitor and a second terminal of the second capacitor are coupled together and to the center tap.

6. The voltage converter of claim 5 , wherein:

the first and second auxiliary windings are configured to:

generate a first auxiliary voltage in response to a first inductor voltage generated in the primary winding; and

generate a second auxiliary voltage in response to a second inductor voltage generated in the primary winding;

the first capacitor is configured to store a first charge voltage in response to the first auxiliary voltage being generated in the first auxiliary winding; and

the second capacitor is configured to store a second charge voltage in response to the second auxiliary voltage being generated in the second auxiliary winding.

7. The voltage converter of claim 3 , wherein the gate driver circuit further comprises a switching startup circuit coupled to the auxiliary voltage bus and configured to provide a startup voltage to the auxiliary voltage bus prior to the auxiliary voltage bus receiving the summed voltage.

8. The voltage converter of claim 7 , wherein the switching startup circuit comprises:

a first terminal coupled to the positive rail of the auxiliary voltage bus;

a second terminal coupled to a negative rail of the auxiliary voltage bus;

a first diode coupled to the first terminal;

a second diode coupled to the first diode at a first node and coupled to the second terminal; and

a resistor coupled to the first node and configured to receive a voltage based on an input voltage.

9. The voltage converter of claim 8 , wherein the switching start-up circuit further comprises an enable circuit coupled to the resistor and comprising:

a switching device coupled to the resistor; and

a control network coupled to the switching device and configured to control switching of the switching device into conducting and non-conducting states, the control network comprising:

a resistor divider coupled to a control terminal of the switching device;

a switching device coupled to the resistor divider; and

an enable input configured to receive a signal for controlling the switching device into an on state or into an off state.

10. The voltage converter of claim 8 , wherein the voltage converter comprises a non-synchronous buck converter.

11. A method of manufacturing a voltage converter comprising:

coupling a first diode of a voltage summer to a secondary winding of a transformer, the transformer further comprising a primary winding inductively coupleable with the secondary winding;

coupling a second diode of the voltage summer to the secondary winding;

coupling a first capacitor of the voltage summer to the first diode;

coupling a second capacitor of the voltage summer to the second diode;

coupling an auxiliary voltage bus with the voltage summer;

coupling a voltage input of a gate driver integrated circuit (IC) to the auxiliary voltage bus;

coupling a logic input of the gate driver IC to a pulse signal output of a controller; and

configuring the gate driver IC to control a conducting state of a switching device based on a summed voltage and based on the pulse signal.

12. The method of claim 11 , wherein coupling the voltage input of the gate driver IC to the auxiliary voltage bus comprises coupling the voltage input of the gate driver IC to a positive rail of the auxiliary voltage bus.

13. The method of claim 12 , further comprising configuring the auxiliary bus is to receive the summed voltage from the voltage summer based on a sum of voltages stored in the first and second capacitors.

14. The method of claim 13 , further comprising forming the secondary winding into a center-tapped winding having a center tap;

wherein a first auxiliary winding is formed between a first end of the secondary winding and the center tap; and

wherein a second auxiliary winding is formed between a second end of the secondary winding and the center tap.

15. The method of claim 14 further comprising:

coupling the first diode between the first end of the first auxiliary winding and a first terminal of the first capacitor;

coupling the second diode between the second end of the first auxiliary winding and a first terminal of the second capacitor; and

coupling a second terminal of the first capacitor and a second terminal of the second capacitor together and to the center tap.

16. The method of claim 13 further comprising coupling a switching startup circuit to the auxiliary voltage bus.

17. The method of claim 16 further comprising configuring the switching startup circuit to provide a startup voltage to the auxiliary voltage bus prior to the auxiliary voltage bus receiving the summed voltage.

18. The method of claim 16 , wherein coupling the switching startup circuit to the auxiliary voltage bus comprises:

coupling a first terminal of the switching startup circuit to the positive rail of the auxiliary voltage bus;

coupling a second terminal of the switching startup circuit to a negative rail of the auxiliary voltage bus;

coupling a first diode of the switching startup circuit to the first terminal;

coupling a second diode of the switching startup circuit to the first diode at a first node and to the second terminal; and

coupling a resistor of the switching startup circuit to the first node;

wherein the resistor is configured to receive a voltage based on an input voltage.

19. The method of claim 18 , wherein coupling the switching startup circuit to the auxiliary voltage bus further comprises:

coupling a switching device coupled to the resistor; and

coupling a control network to the switching device;

wherein the control network is configured to control switching of the switching device into conducting and non-conducting states.

20. The method of claim 19 , wherein coupling the control network to the switching device comprises:

coupling a control network resistor divider to a control terminal of the switching device;

coupling a control network switching device to the control network resistor divider; and

coupling an enable input to the s control network witching device for controlling the control network switching device into an on state or into an off state.

Assignments (3)
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 5, 2025
From: ASTEC INTERNATIONAL LIMITED
To: AES GLOBAL HOLDINGS PTE. LTD.
Reel/Frame 070404/0904 →
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 5, 2025
From: AES GLOBAL HOLDINGS PTE. LTD.
To: ASTEC INTERNATIONAL LIMITED
Reel/Frame 070404/0863 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2023
From: RYAN, ROBERT; HOGAN, DIARMUID
To: AES GLOBAL HOLDINGS PTE LTD.
Reel/Frame 063061/0878 →
Continuity (2)
Continuation 17220976 · Apr 2, 2021
Related Publication 20230097921A1 · Mar 30, 2023