Transistor amplifier with PCB routing and surface mounted transistor die
A transistor amplifier package includes a package substrate comprising conductive patterns exposed by solder mask patterns at a surface thereof, and at least one transistor die comprising a semiconductor structure attached to the surface of the package substrate by a solder material and aligned by the solder mask patterns such that respective gate, drain, and/or source terminals of the at least one transistor die are electrically connected to respective ones of the conductive patterns. Related transistor amplifiers and fabrication methods are also discussed.
1 . A transistor amplifier package, comprising:
a package substrate comprising conductive patterns exposed by solder mask patterns at a surface thereof;
at least one transistor die comprising a semiconductor structure attached to the surface of the package substrate by a solder paste on the surface of the package substrate such that respective gate, drain, and/or source terminals of the at least one transistor die are aligned by the solder mask patterns and are electrically connected to respective ones of the conductive patterns by the solder paste.
2 . The transistor amplifier package of claim 1 , wherein the at least one transistor die comprises:
a patterned backside metal layer on a bottom surface of the semiconductor structure, wherein the patterned backside metal layer comprises the respective gate, drain, and/or source terminals; and
a barrier metal layer between the patterned backside metal layer and the solder paste on the surface of the substrate.
3 . The transistor amplifier package of claim 2 , wherein the barrier metal layer comprises at least one of nickel, titanium, and or an alloy thereof.
4 . The transistor amplifier package of claim 1 , wherein the at least one transistor die comprises:
a plurality of conductive pillars on a top surface of the semiconductor structure adjacent a transistor active region and electrically coupled to the respective gate, drain, and/or source terminals,
wherein the solder paste is between the conductive pillars and the surface of the substrate.
5 . The transistor amplifier package of claim 1 , further comprising:
one or more discrete passive electrical components attached to the surface of the package substrate by the solder paste and aligned by the solder mask patterns.
6 . The transistor amplifier package of claim 5 , wherein the one or more discrete passive electrical components and/or the at least one transistor die are spaced apart from one another by respective gaps of less than about 0.25 mm, or about 0.25 mm to about 0.1 mm.
7 . The transistor amplifier package of claim 5 , wherein respective terminals of the one or more discrete passive electrical components are electrically connected to the respective gate, drain, and/or source terminals of the at least one transistor die by the respective ones of the conductive patterns.
8 . The transistor amplifier package of claim 5 , wherein at least one of the respective gate, drain, and/or source terminals is on a top surface of the semiconductor structure adjacent a transistor active region, and further comprising:
at least one wire bond electrically connecting the at least one of the respective gate, drain, and/or source terminals on the top surface to a respective terminal of the one or more discrete passive electrical components.
9 . The transistor amplifier package of claim 5 , wherein the one or more discrete passive electrical components define a portion of an input, inter-stage, or output impedance matching circuit or harmonic termination circuit.
10 . The transistor amplifier package of claim 1 , wherein the conductive patterns provide respective leads for radio frequency (“RF”) signal connections that are substantially coplanar with the surface of the package substrate having the at least one transistor die attached thereto.
11 . The transistor amplifier package of claim 10 , wherein the package substrate comprises an electrically insulating member, wherein the respective leads are free of electrical connections that extend substantially beyond edges of the electrically insulating member.
12 . The transistor amplifier package of claim 10 , wherein the conductive patterns comprise an embedded conductive member extending through the electrically insulating member, and the source terminal of the at least one transistor die is attached to the embedded conductive member by the solder paste at the surface of the package substrate.
13 . The transistor amplifier package of claim 12 , wherein the package is free of a thermally conductive package submount.
14 . The transistor amplifier package of claim 12 , further comprising:
a thermally conductive package submount having the package substrate thereon, wherein the respective leads do not extend substantially beyond edges of the thermally conductive package submount.
15 . The transistor amplifier package of claim 1 , further comprising:
an environmental protection layer conformally extending on one or more surfaces of the at least one transistor die.
16 . The transistor amplifier package of claim 15 , wherein the transistor amplifier package is free of an overmold or lid member on the at least one transistor die.
17 . The transistor amplifier package of claim 1 , wherein the transistor amplifier package is free of wire bonds.
18 . A transistor amplifier, comprising:
a substrate comprising conductive patterns at a surface thereof;
at least one transistor die comprising a semiconductor structure and a patterned backside metal layer on a bottom surface thereof, wherein the patterned backside metal layer is attached to the surface of the substrate by a solder paste on the surface of the substrate such that respective gate, drain, and/or source terminals of the at least one transistor die are electrically connected to respective ones of the conductive patterns by the solder paste; and
a barrier metal layer between the patterned backside metal layer and the solder paste.
19 . A transistor amplifier, comprising:
a substrate comprising conductive patterns exposed by solder mask patterns at a surface thereof and providing respective leads for signal connections;
at least one transistor die comprising a semiconductor structure attached to the surface of the substrate by a solder paste on the surface of the substrate; and
one or more discrete passive electrical components attached to the surface of the substrate by the solder paste,
wherein the one or more discrete passive electrical components and/or the at least one transistor die are spaced apart from one another on the surface of the substrate by respective gaps of less than about 0.25 mm.
20 . A method of fabricating transistor amplifier packages, the method comprising:
providing a plurality of package substrates respectively comprising conductive patterns exposed by solder mask patterns at respective surfaces thereof;
applying a solder paste to the respective surfaces of the package substrates using a stencil thereon, wherein the stencil exposes the conductive patterns of the package substrates;
providing at least one transistor die comprising a semiconductor structure on the respective surfaces of the package substrates; and
performing a solder reflow process to attach and align the at least one transistor die on the respective surfaces such that respective gate, drain, and/or source terminals of the at least one transistor die are aligned by the solder mask patterns and are electrically connected to respective ones of the conductive patterns by the solder paste.
21 . The transistor amplifier package of claim 1 , wherein the at least one transistor die comprises a radio frequency (“RF”) transistor die.