Clock and data recovery lock detection circuit for verifying lock condition in presence of imbalanced early to late vote ratios
Methods and systems are described for generating early and late votes for a clock recovery system, each early or late vote associated with a detected transitional data pattern in a data stream, generating a first early-late vote measurement reflective of an imbalance between the early and late votes that are generated during a first time interval, generating a second early-late vote measurement reflective of an imbalance between the early and late votes that are generated during a second time interval, comparing the first and the second early-late vote measurements, and outputting a CDR-lock signal at least in part responsive to determining that the first and the second early-late vote measurements are within a predetermined threshold.
1. A method comprising:
sampling a data signal using a pair of samplers having decision thresholds corresponding to speculative decision feedback equalization (DFE) terms, responsively selecting an output of the pair of samplers as a data decision based on a prior data decision, and storing the data decision in a data history buffer;
detecting a transitional data pattern from data decision sequences in the data history buffer, and responsively selecting an output from another of the pair of samplers as an early-late vote in the data signal;
generating a first early-late vote measurement reflective of an imbalance between the early and late votes that are generated during a first time interval;
generating a second early-late vote measurement reflective of an imbalance between the early and late votes that are generated during a second time interval;
comparing the first and the second early-late vote measurements; and
outputting a clock and data recovery (CDR)-lock signal at least in part responsive to determining that the first and the second early-late vote measurements are within a predetermined threshold.
2. The method of claim 1 , wherein durations of the first and second time intervals correspond to a predetermined number of early and late votes detected in the data stream.
3. The method of claim 1 , wherein durations of the first and the second time intervals correspond to a predetermined number of signaling intervals.
4. The method of claim 3 , wherein generating the first early-late vote measurement comprises normalizing at least one of (i) the early votes (ii) the late votes and (iii) a difference between the early and late votes that are generated during the first time interval by a total number of the early and late votes generated during the first time interval.
5. The method of claim 1 , wherein comparing the first and second early-late vote measurements comprises determining that a product of a ratio of the first and the second early-late vote measurements is within the predetermined threshold.
6. The method of claim 1 , wherein comparing the first and second early-late vote measurements comprises determining that a ratio of the first and the second early-late vote measurements is within the predetermined threshold.
7. The method of claim 6 , wherein the first and second early-late vote measurements are accumulated in respective registers, and wherein determining that the ratio of the first and the second early-late vote measurements is within the predetermined threshold comprises performing a logical exclusive OR (XOR) comparison of the first and second early-late vote measurements accumulated in the respective registers.
8. The method of claim 7 , wherein the predetermined threshold corresponds to one or more LSBs of the registers associated with “don't care” results.
9. The method of claim 1 , wherein the imbalance between early and late votes generated during the first and second time intervals corresponds to a periodic shift in frequency of a spread-spectrum data sampling clock.
10. The method of claim 9 , wherein the early and late votes control pump-up and pump-down signals of a charge pump, and wherein magnitudes for the pump-up and pump-down signals of the charge pump are different.
11. An apparatus comprising:
a pair of samplers having decision thresholds corresponding to speculative decision feedback equalization (DFE) terms, the pair of samplers configured to sample a data signal and to responsively generate respective sampler outputs;
a selection circuit configured to select one of the sampler outputs as a data decision based on a prior data decision;
a data history buffer configured to store each data decision output from the selection circuit;
a data pattern detection circuit configured to detect a transitional data pattern from data decision sequences in the data history buffer, and to responsively provide another of the sampler outputs to an accumulator as an early vote or a late vote in the data signal
the accumulator configured to generate first and second early-late vote measurements reflective of an imbalance between the early and late votes that are generated during first and second time intervals, respectively; and
a clock and data recovery (CDR)-lock detection circuit configured to compare the first and the second early-late vote measurements, and to output a CDR-lock signal at least in part responsive to determining that the first and the second early-late vote measurements are within a predetermined threshold.
12. The apparatus of claim 11 , further comprising a counter configured to increment responsive to selection of each early vote and late vote, and wherein durations of the first and second time intervals correspond to a predetermined number of detected early and late votes.
13. The apparatus of claim 11 , further comprising a counter configured to count signaling intervals, and wherein durations of each of the first and the second time intervals corresponds to a predetermined number of signaling intervals.
14. The apparatus of claim 13 , wherein the accumulator is configured to generate the first early-late vote measurement comprises normalizing at least one of (i) the early votes (ii) the late votes and (iii) a difference between the early and late votes that are generated during the first time interval by a total number of the early and late votes generated during the first time interval.
15. The apparatus of claim 11 , wherein the CDR-lock detection circuit is configured to compare the first and second early-late vote measurements to determine that a ratio of the first and the second early-late vote measurements is within the predetermined threshold.
16. The apparatus of claim 15 , wherein the accumulator comprises registers for storing the first and second early-late vote measurements, and wherein the CDR-lock detection circuit comprises logical exclusive OR (XOR) circuits configured to form a logical XOR comparison of the first and second early-late vote measurements accumulated in the respective registers to determine that the ratio of the first and the second early-late vote measurements is within the predetermined threshold.
17. The apparatus of claim 16 , wherein the predetermined threshold corresponds to one or more LSBs of the registers associated with “don't care” results.
18. The apparatus of claim 11 , wherein the imbalance between early and late votes generated during the first and second time intervals corresponds to a periodic frequency shift in a spread-spectrum data sampling clock.
19. The apparatus of claim 11 , wherein the CDR-lock detection circuit is further configured to compare the first and second early-late vote measurements to determine that a product of a ratio of the first and the second early-late vote measurements is within the predetermined threshold.
20. The apparatus of claim 11 , early and late votes control pump-up and pump-down signals of a charge pump, and wherein the imbalance between early and late votes generated during the first and second time intervals is associated with magnitudes for the pump-up and pump-down signals of the charge pump being different.