IP Library Granted Patent US 12,604,571
Granted Patent B2
US 12,604,571 · App. 17/937,878 · Granted Apr 14, 2026

Light emitting diodes with lattice matching sidewall passivation layer and method of making thereof

Inventor: Saket Chadda (San Jose, CA)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H10H20/84H10H20/0133H10H20/01335H10H20/821H10H20/824H10H20/825H10H20/833H10H20/841H10H20/857H10H20/032H10H20/034H10H20/0364
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Quick Facts
Patent No.
US 12,604,571
App. No.
17/937,878
Granted
Apr 14, 2026
Kind
B2
Abstract

A light emitting diode includes a mesa structure containing a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, and a second-conductivity-type compound semiconductor layer, and a passivation material layer contacting at least a sidewall of the mesa structure. The passivation material layer has a first crystal structure that matches a second crystal structure of the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer.

Claims (51)

1 . A light emitting diode, comprising:

a mesa structure comprising a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, and a second-conductivity-type compound semiconductor layer; and

a passivation material layer contacting at least a sidewall of the mesa structure, wherein the passivation material layer comprises a first crystal structure that matches a second crystal structure of the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer,

wherein the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer comprise phosphorous, and

wherein the passivation material layer comprises ZnS, GaAs or GaP.

2 . The light emitting diode of claim 1 , wherein the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer each comprise doped Group III-phosphide material.

3 . The light emitting diode of claim 1 , further comprising:

a doped compound semiconductor layer located between a substrate and the first-conductivity-type compound semiconductor layer; and

a transparent conductive layer located over the second-conductivity-type compound semiconductor layer.

4 . The light emitting diode of claim 3 , wherein the passivation material layer laterally surrounds the mesa structure and comprises:

an upper horizontal portion that overlies a peripheral region of a top side of the mesa structure;

a bottom horizontal portion which contacts a top surface of the doped compound semiconductor layer; and

a sidewall portion which contacts the sidewall of the mesa structure and is adjoined to a periphery of the upper and lower horizontal portions.

5 . The light emitting diode of claim 4 , wherein:

the upper horizontal portion is located above the transparent conductive layer; and an opening in the upper horizontal portion is located over a center region of the mesa structure and exposes the transparent conductive layer.

6 . The light emitting diode of claim 5 , further comprising a reflector layer laterally surrounding and contacting an outer surface of the sidewall portion of the passivation material layer, wherein the reflector layer electrically contacts the transparent conductive layer through the opening.

7 . The light emitting diode of claim 6 , further comprising:

a first conductive bonding structure overlying and electrically connected to the transparent conductive layer

a dielectric matrix layer laterally surrounding the passivation material layer;

a contact via structure vertically extending through the dielectric matrix layer and electrically contacting the doped compound semiconductor layer;

a second conductive bonding structure overlying and electrically connected to the contact via structure; and

a backplane electrically connected to the first conductive bonding structure and the second conductive bonding structure.

8 . The light emitting diode according to claim 1 , wherein the first crystal structure and the second crystal structure are a zinc blende crystal structure.

9 . A method of forming a light emitting diode, comprising:

forming a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, and a second-conductivity-type compound semiconductor layer over a substrate;

forming a mesa structure by etching the first-conductivity-type compound

semiconductor layer, the active layer stack and the second-conductivity-type compound semiconductor layer; and

forming a passivation material layer in contact with at least a sidewall of the mesa structure, wherein the passivation material layer comprises a first crystal structure that matches a second crystal structure of the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer,

wherein the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer comprise phosphorous, and

wherein the passivation material layer comprises ZnS, GaAs or GaP.

10 . The method of claim 9 , wherein the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer each comprise doped Group III-phosphide material.

11 . The method of claim 9 , further comprising:

forming a transparent conductive oxide layer over the second-conductivity-type compound semiconductor layer prior to forming the passivation material layer;

forming an opening through the upper portion of the passivation material layer over a center region of the mesa structure to expose the transparent conductive oxide layer;

forming a continuous reflector layer over the passivation material layer and in the opening such that the continuous reflector layer is electrically connected to the transparent conductive oxide layer; and

patterning the continuous reflector layer to form a reflector layer that laterally surrounds the mesa structure and the passivation material layer.

12 . The method of claim 11 , wherein the passivation material layer laterally surrounds the mesa structure and comprises:

an upper horizontal portion that overlies a peripheral region of a top side of the mesa structure;

a bottom horizontal portion which contacts a top surface of the doped compound semiconductor layer; and

a sidewall portion which contacts the sidewall of the mesa structure and is adjoined to a periphery of the upper and lower horizontal portions.

13 . The method of claim 11 , further comprising forming a first conductive bonding structure on a physically exposed surface of the reflector layer.

14 . The method of claim 13 , further comprising:

forming a dielectric matrix layer laterally surrounding the passivation material layer;

forming a contact via structure vertically extending through the dielectric matrix layer and contacting a doped compound semiconductor layer located between the substrate and the first-conductivity-type compound semiconductor layer;

forming a second conductive bonding structure overlying and electrically connected to the contact via structure; and

electrically contacting the first conductive bonding structure and the second conductive bonding structure to a backplane.

15 . The method according to claim 9 , wherein the first crystal structure and the second crystal structure are a zinc blende crystal structure.

16 . A light emitting diode, comprising:

a mesa structure comprising a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, and a second-conductivity-type compound semiconductor layer; and

a passivation material layer contacting at least a sidewall of the mesa structure, wherein the passivation material layer comprises a first crystal structure that matches a second crystal structure of the first-conductivity-type compound semiconductor layer and the second-conductivity-type compound semiconductor layer,

wherein the passivation material layer comprises ZnS, GaAs or GaP.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2024
From: GLO TECHNOLOGIES LLC
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 068297/0220 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2023
From: SYSONAN, INC.
To: GLO TECHNOLOGIES LLC
Reel/Frame 065178/0210 →
CHANGE OF NAME Recorded Oct 5, 2023
From: NANOSYS, INC.
To: SYSONAN, INC.
Reel/Frame 065156/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2022
From: CHADDA, SAKET
To: NANOSYS, INC.,
Reel/Frame 061304/0540 →
Continuity (2)
Provisional Application 63253225 · Oct 7, 2021
Related Publication 20230113198A1 · Apr 13, 2023
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