IP Library › Granted Patent US 11,881,871
Granted Patent B1
US 11,881,871 · App. 17/944,837 · Granted Jan 23, 2024

On-the-fly scaling factor change for irregular LDPC codes

Inventors: Fan Zhang (Fremont, CA); Haobo Wang (San Jose, CA); Meysam Asadi (Fremont, CA)
Assignee: SK hynix Inc.
H03M13/118H03M13/611
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Quick Facts
Patent No.
US 11,881,871
App. No.
17/944,837
Granted
Jan 23, 2024
Kind
B1
Abstract

Decoding method and memory system that decodes data and estimates a weighted checksum on the decoded data to determine whether the decoding is successful. The weighted checksum is calculated based on a first group and a second group, the first group is associated with weights for high degree nodes of an irregular parity check matrix, and the second group is associated with weights for low degree nodes of the irregular parity check matrix.

Claims (42)

1. A decoding method comprising:

decoding data; and

estimating a weighted checksum on the decoded data to determine whether the decoding is successful,

wherein

the weighted checksum is calculated based on a first group and a second group,

the first group is associated with weights for high degree nodes of an irregular parity check matrix, and

the second group is associated with weights for low degree nodes of the irregular parity check matrix.

2. The method of claim 1 , wherein

the weights for the high degree nodes depend on an average column weight of the high degree nodes, and

the weights for the low degree nodes depend on an average column weight of the low degree nodes.

3. The method of claim 2 , wherein the weights for the high degree nodes are inter-exchanged with the weights for the low degree nodes for estimation of the weighted checksum.

4. The method of claim 1 , wherein the irregular parity check matrix comprises high degree regions with high column weights separated from low degree regions with low column weights lower than the high column weights.

5. The method of claim 1 , wherein

the irregular parity check matrix comprises a low density parity check matrix, and

the method further comprises determining a LDPC checksum in accordance with low density parity check LDPC decoding.

6. The method of claim 5 , further comprising terminating the LDPC decoding if generated CRC parity bits match initial CRC bits and the LDPC checksum is less than a predetermined threshold.

7. The method of claim 5 , further comprising adjusting scaling values for each iteration of the LDPC decoding.

8. The method of claim 1 , wherein the estimating a weighted checksum comprises on-the-fly processing of circulants in the parity check matrix.

9. The method of claim 1 , further co uprising applying scaling factors based on the weights of both the low degree nodes and the high degree nodes to a mini-sum decoder decoding the irregular LDPC codes.

10. The method of claim 1 , further comprising replacing a checksum in a bit-flop BF decoder with the estimated weighted checksum based on the weights for the high degree nodes and the weights for the low degree nodes.

11. A memory system, comprising:

a storage; and

a decoder coupled to the storage and configured to:

decode data; and

estimate a weighted checksum on the decoded data to determine whether the decoding is successful,

wherein

the weighted checksum is calculated based on a first group and a second group,

the first group is associated with weights for high degree nodes of an irregular parity check matrix, and

the second group is associated with weights for low degree nodes of the irregular parity check matrix.

12. The memory system of claim 11 , wherein

the weights for the high degree nodes depend on an average column weight of the high degree nodes, and

the weights for the low degree nodes depend on an average column weight of the low degree nodes.

13. The memory system of claim 11 , wherein the weights for the high degree nodes are inter-exchanged with the weights for the low degree nodes for estimation of the weighted checksum.

14. The memory system of claim 11 , wherein the irregular parity check matrix comprises high degree regions with high column weights separated from low degree regions with low column weights lower than the high column weights.

15. The memory system of claim 11 , wherein

the parity check matrix comprises a low density parity check matrix, and

the decoder is configured to determine a LDPC checksum in accordance with low density parity check LDPC decoding.

16. The memory system of claim 15 , wherein the decoder is configured to terminate the LDPC decoding if generated CRC parity bits match initial CRC bits and the LDPC checksum is less than a predetermined threshold.

17. The memory system of claim 15 , wherein the decoder is configured to adjust scaling values for each iteration of the LDPC decoding.

18. The memory system of claim 11 , wherein the decoder is configured to estimate the weighted checksum by on-the-fly processing of circulants in the parity check matrix.

19. The memory system of claim 11 , wherein the decoder is configured to apply scaling factors based on the weights of both the low degree nodes and the high degree nodes to a mini-sum decoder decoding the irregular LDPC codes.

20. The memory system of claim 11 , wherein the decoder is configured to replace a checksum in a bit-flop BF decoder with the estimated weighted checksum based on the weights for the high degree nodes and the weights for the low degree nodes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2023
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 064499/0306 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2022
From: ZHANG, FAN; WANG, HAOBO; ASADI, MEYSAM
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 061096/0694 →
Cited By (4)
US 12,212,336 US 12,445,151 US 12,633,943 US 12,705,134