IP Library Granted Patent US 11,696,053
Granted Patent B2
US 11,696,053 · App. 17/948,908 · Granted Jul 4, 2023

Imaging element, imaging method and electronic apparatus

Inventors: Atsumi Niwa (Kanagawa, JP); Yosuke Ueno (Kanagawa, JP); Shimon Teshima (Kanagawa, JP); Daijiro Anai (Kanagawa, JP); Yoshinobu Furusawa (Fukuoka, JP); Taishin Yoshida (Tokyo, JP); Takahiro Uchimura (Kanagawa, JP); Eiji Hirata (Tokyo, JP)
Assignee: SONY GROUP CORPORATION
H04N25/75H01L27/14612H01L27/14621H01L27/14636H01L27/14645H04N25/134H04N25/70H04N25/772H04N25/778H03M1/123H03M1/1295H03M1/56H04N2209/045
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Quick Facts
Patent No.
US 11,696,053
App. No.
17/948,908
Granted
Jul 4, 2023
Kind
B2
Abstract

There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Claims (42)

1. Alight detecting device, comprising:

a comparator, including;

current mirror transistors;

a first differential pair unit, the first differential pair unit including;

a first transistor, a gate of the first transistor configured to receive a first pixel signal;

a second transistor;

a first select transistor coupled to one of the current mirror transistors and the first transistor; and

a second select transistor coupled to another one of the current mirror transistors; and

a second differential pair unit, the second differential pair unit including;

a third transistor, a gate of the third transistor configured to receive a second pixel signal;

a fourth transistor;

a third select transistor coupled the one of the current mirror transistors and the third transistor; and

a fourth select transistor coupled the other one of the current mirror transistors and the fourth transistor,

wherein a gate of the second transistor and a gate of the fourth transistor are configured to receive a reference signal.

2. The light detecting device according to claim 1 , further comprising:

a first capacitor; and

a second capacitor, wherein the first capacitor is coupled to the gate of the second transistor, and wherein the second capacitor is coupled to the gate of the fourth transistor.

3. The light detecting device according to claim 2 , further comprising:

a reference signal line, wherein reference signal line is coupled to the first and second capacitors.

4. The light detecting device according to claim 3 , further comprising:

a ramp signal generation circuit, wherein a reference signal is provided from the ramp signal generation circuit to the first and second capacitors over the reference signal line.

5. The light detecting device according to claim 1 , further comprising:

a current source, wherein the current source is coupled to the first and second transistors.

6. The light detecting device according to claim 5 , wherein the current source is further coupled to the third and fourth transistors.

7. The light detecting device according to claim 1 , wherein the first pixel signal is provided to the first transistor by a first vertical signal line, and wherein the second pixel signal is provided to the third transistor by a second vertical signal line.

8. The light detecting device according to claim 1 , wherein a differential pair output is provided to an amplification unit.

9. The light detecting device according to claim 1 , wherein the first differential pair unit and the second differential pair unit are provided in parallel.

10. Alight detecting device, comprising:

a comparator, including;

current mirror transistors;

a first transistor, a gate of the first transistor configured to receive a first pixel signal;

a second transistor, a gate of the second transistor configured to receive a reference signal;

a first select transistor coupled to one of the current mirror transistors and further coupled to the first transistor;

a third transistor, a gate of the third transistor configured to receive a second pixel signal; and

a third select transistor coupled the one of the current mirror transistors and further coupled to the third transistor.

11. The light detecting device according to claim 10 , further comprising:

a first capacitor; and

a second capacitor, wherein the first pixel signal is input via the first capacitor from a first vertical signal line, and wherein the second pixel signal is input via a second capacitor from a second vertical signal line.

12. The light detecting device according to claim 11 , wherein the first and second vertical signal lines correspond to a first pixel column.

13. The light detecting device according to claim 12 , further comprising:

a shield line, wherein the shield line is disposed between the first and second vertical signal lines.

14. The light detecting device according to claim 10 , wherein a differential pair output is provided to an amplification unit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2023
From: NIWA, ATSUMI; UENO, YOSUKE; TESHIMA, SHIMON; ANAI, DAIJIRO; FURUSAWA, YOSHINOBU; YOSHIDA, TAISHIN; UCHIMURA, TAKAHIRO; HIRATA, EIJI
To: SONY CORPORATION
Reel/Frame 062343/0311 →
CHANGE OF NAME Recorded Jan 11, 2023
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 062353/0369 →
Priority Claims (4)
JP 2014-114143 · Jun 2, 2014 · national
JP 2014-230000 · Nov 12, 2014 · national
JP 2014-230001 · Nov 12, 2014 · national
JP 2014-230002 · Nov 12, 2014 · national
Continuity (6)
Continuation 17119084 · Dec 11, 2020
Continuation 16840077 · Apr 3, 2020
Continuation 16559795 · Sep 4, 2019
Continuation 15987363 · May 23, 2018
Continuation 15313645
Related Publication 20230013673A1 · Jan 19, 2023
Cited By (1)
US 12,289,959