IP Library Granted Patent US 12,255,641
Granted Patent B2
US 12,255,641 · App. 17/950,510 · Granted Mar 18, 2025

Isolated drive circuit and isolated driving method with improved magnetic field immunity

Inventor: Naixing Kuang (Hangzhou, CN)
Assignee: Chengdu Monolithic Power Systems Co., Ltd.
H03K17/689
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Quick Facts
Patent No.
US 12,255,641
App. No.
17/950,510
Granted
Mar 18, 2025
Kind
B2
Abstract

A drive circuit configured to drive a power stage including a high voltage power switch device. The drive circuit has a transmitter configured to send a control signal, and a receiver configured to transfer a received signal to a drive signal by a first isolated capacitor loop and a second isolated capacitor loop. The first isolated capacitor loop has a same area as the second isolated capacitor loop.

Claims (64)

1. An isolated drive circuit, comprising:

a transmitter at a primary side, configured to send a control signal;

a first isolated capacitor loop and a second isolated capacitor loop placed between the transmitter and a receiver; and

the receiver at a secondary side, configured to sample a voltage difference between a first voltage indicative of the control signal delivered by the first isolated capacitor loop and a second voltage indicative of the control signal delivered by the second isolated capacitor loop; wherein

the first isolated capacitor loop comprises a first capacitor pair and a second capacitor pair placed between the primary side and the secondary side; and wherein

the first capacitor pair and the second capacitor pair perform a differential transmission.

2. The isolated drive circuit of claim 1 , wherein:

the first isolated capacitor loop has a same area as the second isolated capacitor loop.

3. The isolated drive circuit of claim 1 , wherein:

the transmitter, the receiver, the first isolated capacitor loop and the second isolated capacitor loop are packaged together in a package outline.

4. The isolated drive circuit of claim 1 , wherein:

the transmitter has a positive output terminal and a negative output terminal;

the receiver has a first receive terminal, a second receive terminal, a third receive terminal and a fourth receive terminal;

the first isolated capacitor loop comprises: the first capacitor pair placed between the positive output terminal of the transmitter and the first receive terminal of the receiver, and the second capacitor pair placed between the negative output terminal of the transmitter and the second receive terminal of the receiver; and

the second isolated capacitor loop comprises: a third capacitor pair placed between the negative output terminal of the transmitter and the third receive terminal of the receiver, and a fourth capacitor pair placed between the positive output terminal of the transmitter and the fourth receive terminal of the receiver.

5. The isolated drive circuit of claim 4 , wherein:

each of the first capacitor pair, the second capacitor pair, the third capacitor pair and the fourth capacitor pair includes one capacitor or two capacitors.

6. The isolated drive circuit of claim 4 , further comprising:

a first resistor, placed between the first receive terminal and the second receive terminal of the receiver; and

a second resistor, placed between the third receive terminal and the fourth receive terminal of the receiver.

7. The isolated drive circuit of claim 1 , wherein:

the transmitter has a positive output terminal and a negative output terminal;

the receiver has a positive receive terminal and a negative receive terminal;

the first isolated capacitor loop comprises: the first capacitor pair placed between the positive output terminal of the transmitter and the positive receive terminal of the receiver, and the second capacitor pair placed between the negative output terminal of the transmitter and the negative receive terminal of the receiver; and

the second isolated capacitor loop comprises: a third capacitor pair placed between the negative output terminal of the transmitter and the negative receive terminal of the receiver, and a fourth capacitor pair placed between the positive output terminal of the transmitter and the positive receive terminal of the receiver.

8. The isolated drive circuit of claim 7 , wherein:

each of the first capacitor pair, the second capacitor pair, the third capacitor pair and the fourth capacitor pair includes one capacitor or two capacitors.

9. The isolated drive circuit of claim 7 , further comprising:

a resistor, placed between the positive receive terminal and the negative receive terminal of the receiver.

10. The isolated drive circuit of claim 7 , further comprising:

a first resistor, placed between the positive receive terminal of the receiver and a reference ground; and

a second resistor, placed between the negative receive terminal of the receiver and the reference ground.

11. An isolated drive circuit, comprising:

a first transmit circuit and a second transmit circuit, respectively configured to provide a first control signal and a second control signal;

a first isolated capacitor loop, placed between the first transmit circuit and a receiver;

a second isolated capacitor loop, placed between the second transmit circuit and the receiver; and

the receiver, configured to sample a voltage difference between a first voltage indicative of the first control signal delivered by the first isolated capacitor loop and a second voltage indicative of the second control signal delivered by the second isolated capacitor loop; wherein

the first isolated capacitor loop comprises a first capacitor pair and a second capacitor pair placed between the primary side and the secondary side; and

wherein the first capacitor pair and the second capacitor pair perform a differential transmission.

12. The isolated drive circuit of claim 11 , wherein:

the first transmit circuit, the second transmit circuit, the receiver, the first isolated capacitor loop and the second isolated capacitor loop are packaged together in a package outline.

13. The isolated drive circuit of claim 11 , wherein:

the first isolated capacitor loop has a same area as the second isolated capacitor loop.

14. The isolated drive circuit of claim 11 , wherein:

the first transmit circuit and the second transmit circuit respectively has a positive output terminal and a negative output terminal;

the receiver has a first receive terminal, a second receive terminal, a third receive terminal, and a fourth receive terminal;

the first isolated capacitor loop includes: the first capacitor pair placed between the positive output terminal of the first transmit circuit and the first receive terminal of the receiver, and the second capacitor pair placed between the negative output terminal of the first transmit circuit and the second receive terminal of the receiver; and

the second isolated capacitor loop includes: a third capacitor pair placed between the negative output terminal of the second transmit circuit and the third receive terminal of the receiver, and a fourth capacitor pair placed between the positive output terminal of the second transmit circuit and the fourth receive terminal of the receiver.

15. The isolated drive circuit of claim 14 , further comprising:

a first resistor, placed between the first receive terminal and the second receive terminal of the receiver; and

a second resistor, placed between the third receive terminal and the fourth receive terminal of the receiver.

16. The isolated drive circuit of claim 14 , wherein:

each of the first capacitor pair, the second capacitor pair, the third capacitor pair and the fourth capacitor pair includes one capacitor or two capacitors.

17. An isolated driving method, comprising:

sending a control signal at a primary side, and delivering the control signal to a secondary side by way of a first isolated capacitor loop to obtain a first signal;

sending the control signal at the primary side, and delivering the control signal to the secondary side by way of a second isolated capacitor loop to obtain a second signal; and

sampling a voltage difference between the first signal and the second signal; wherein

the first isolated capacitor loop comprises a first capacitor pair and a second capacitor pair placed between the primary side and the secondary side; and wherein

the first capacitor pair and the second capacitor pair perform a differential transmission.

18. The isolated driving method of claim 17 , wherein:

the first isolated capacitor loop has a same area as the second isolated capacitor loop.

19. The isolated driving method of claim 17 , wherein:

the second isolated capacitor loop comprises a third capacitor pair and a fourth capacitor pair placed between the primary side and the secondary side; and wherein

the third capacitor pair and the fourth capacitor pair also perform a differential transmission.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2022
From: KUANG, NAIXING
To: CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
Reel/Frame 061184/0014 →
Priority Claims (1)
CN 202111148376.3 · Sep 28, 2021 · national
Continuity (1)
Related Publication 20230101006A1 · Mar 30, 2023
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