IP Library › Granted Patent US 12,328,070
Granted Patent B2
US 12,328,070 · App. 17/959,693 · Granted Jun 10, 2025

Constant-on-time power converter with adaptive interleaving

Inventors: Gaurav Bawa (Austin, TX); Panduka Wijetunga (Thousand Oaks, CA)
Assignee: Rambus Inc.
H02M3/158H02M1/0043H02M3/1586
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Quick Facts
Patent No.
US 12,328,070
App. No.
17/959,693
Granted
Jun 10, 2025
Kind
B2
Abstract

A power converter includes a plurality of power stages configured to generate an output current that has an output voltage, based on an input current that as an input voltage. The plurality of power stages comprises a first power stage and one or more additional power stages. The power converter also includes a control circuit coupled to the plurality of power stages. The control circuit is configured to periodically turn on each of the plurality of power stages. The control circuit determines a respective time delay between turning on the first power stage and turning on each of the one or more additional power stages based on a switching time-period of the first power stage.

Claims (40)

1. A power converter, comprising:

a plurality of power stages configured to generate an output current that has an output voltage, based on an input current that has an input voltage, wherein the plurality of power stages comprises a first power stage and a plurality of additional power stages; and

a control circuit coupled to the plurality of power stages, wherein:

the control circuit is configured to periodically turn on each of the plurality of power stages; and

the control circuit determines a respective time delay between turning on the first power stage and turning on each of the plurality of additional power stages based on a switching time-period of the first power stage, wherein the control circuit comprises an adaptive circuit configured to determine the respective time delay for each of the plurality of additional power stages based on the switching time-period of the first power stage;

wherein the adaptive circuit further comprises a comparator comprising first and second inputs coupled to a first capacitor and a second capacitor and configured to assert a first signal when a voltage on the first capacitor equals or is greater than a voltage on the second capacitor; and

wherein the adaptive circuit further comprises a circuit comprising an OR gate, the circuit coupled to receive the first signal and a second signal, wherein the circuit is configured to assert an output signal when the first signal is asserted before assertion of the second signal or when the second signal is asserted before assertion of the first signal, wherein one of the plurality of additional power stages is controlled based on the output signal.

2. The power converter of claim 1 , wherein the control circuit comprises a primary circuit configured to generate a first control signal to periodically turn on the first power stage.

3. The power converter of claim 1 , wherein

the first capacitor is used to determine the switching time-period of the first power stage; and

wherein the second capacitor is used to determine when to turn on only one of the plurality of additional power stages.

4. The power converter of claim 1 , wherein:

the control circuit further comprises a filter circuit coupled to the adaptive circuit; and

the filter circuit is configured to filter a voltage generated by the adaptive circuit.

5. The power converter of claim 1 , wherein the control circuit comprises a set of one or more secondary circuits, each of the one or more secondary circuits configured to periodically turn on a respective power stage of the plurality of additional power stages.

6. The power converter of claim 1 , wherein the respective delay time for each of the plurality of additional power stages varies when the switching time-period of the first power stage varies.

7. The power converter of claim 1 , wherein the power converter comprises at least one of a boost converter or a buck converter.

8. A power converter, comprising:

a means for generating an output current that has an output voltage, based on an input current that as an input voltage, wherein the means for generating comprises a first power stage and a plurality of additional power stages; and

a means for controlling the means for generating the output current, wherein:

the means for controlling the means for generating the output current is configured to periodically turn on each of the first power stage and the plurality of additional power stages; and

the means for controlling the means for generating the output current determines a respective time delay between turning on the first power stage and turning on each of the plurality of additional power stages based on a switching time-period of the first power stage, wherein the means for controlling the means for generating the output current comprises an adaptive circuit configured to determine the respective time delay for each of the plurality of additional power stages based on the switching time-period of the first power stage;

wherein the adaptive circuit further comprises a comparator comprising first and second inputs coupled to a first capacitor and a second capacitor and configured to assert a first signal when a voltage on the first capacitor equals or is greater than a voltage on the second capacitor; and

wherein the adaptive circuit further comprises a circuit comprising an OR gate, the circuit coupled to receive the first signal and a second signal, wherein the circuit is configured to assert an output signal when the first signal is asserted before assertion of the second signal or when the second signal is asserted before assertion of the first signal, wherein one of the plurality of additional power stages is controlled based on the output signal.

9. The power converter of claim 8 , wherein the means for controlling the means for generating the output current comprises a primary circuit configured to generate a first control signal to periodically turn on the first power stage.

10. The power converter of claim 8 , wherein

the first capacitor is used to determine the switching time-period of the first power stage; and

wherein the second capacitor is used to determine when to turn on only one of the plurality of additional power stages.

11. The power converter of claim 8 , wherein:

the means for controlling the means for generating the output current further comprises a filter circuit coupled to the adaptive circuit; and

the filter circuit is configured to filter a voltage generated by the adaptive circuit.

12. The power converter of claim 8 , wherein the means for controlling the means for generating the output current comprises a set of one or more secondary circuits, each of the one or more secondary circuits configured to periodically turn on a respective power stage of the plurality of additional power stages.

13. The power converter of claim 8 , wherein the respective delay time for each of the plurality of additional power stages varies when the switching time-period of the first power stage varies.

14. A method, comprising:

determining a switching time-period of a first power stage of a plurality of power stages, wherein:

the plurality of power stages comprises the first power stage and a plurality of additional power stages; and

the plurality of power stages is configured to generate an output current that has an output voltage, based on an input current that as an input voltage;

determining, by an adaptive circuit, a respective time delay between turning on the first power stage and turning on each of the plurality of additional power stages based on the switching time-period of the first power stage, wherein the adaptive circuit comprises a comparator comprising first and second inputs coupled to a first capacitor and a second capacitor;

asserting, by the adaptive circuit, a first signal when a voltage on the first capacitor equals or is greater than a voltage on the second capacitor, wherein the adaptive circuit further comprises a circuit comprising an OR gate, wherein the circuit is coupled to receive the first signal and a second signal; and

asserting an output signal when the first signal is asserted before assertion of the second signal or when the second signal is asserted before assertion of the first signal, wherein one of the plurality of additional power stages is controlled based on the output signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2022
From: BAWA, GAURAV; WIJETUNGA, PANDUKA
To: RAMBUS INC.
Reel/Frame 061319/0274 →
Continuity (2)
Provisional Application 63252071 · Oct 4, 2021
Related Publication 20230108987A1 · Apr 6, 2023
References Cited (7)
US 20120274293A1 · Ren · 2012 [cited by examiner]
US 20160315538A1 · Nguyen · 2016 [cited by examiner]
US 20190190279A1 · Xu · 2019 [cited by examiner]
US 20220407422A1 · Qin · 2022 [cited by examiner]
Su, Yi-Ping et al., “Pseudo-Ramp Current Balance (PRCB) Technique With Offset Cancellation Control (OCC) in Dual-Phase DC-DC Buck Converter”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, No… [cited by applicant]
Tian, Shuilin et al., “A Three-Terminal Switch Model of Constant On-Time Current Mode With External Ramp Compensation”, IEEE Transactions on Power Electronics, 31.1-1.10.1109/TPEL.2015.2508037, 2015. 10 pages. [cited by applicant]
Xiong, Yi et al., “Constant On-time Controlled Four-phase Buck Converter via Saw-tooth-wave Circuit and its Element Sensitivity”, Proceedings of International Conference on Mechanical, Electrical and Medical Intelligent… [cited by applicant]
Cited By (1)
US 12,537,437