Clock manager redundancy for time synchronized networks
An apparatus for clock manager redundancy comprises a clock circuitry to manage a clock for a device; a first processing circuitry coupled to the clock circuitry to execute instructions to perform operations for a clock manager, the clock manager to receive messages with time information for a network and generate clock manager control information to adjust the clock to a network time for the network; a hardened execution environment coupled to the clock circuitry and the first processing circuitry, the hardened execution environment to comprise: a detector to monitor the clock manager and generate an alert when the detector identifies abnormal behavior of the clock manager; and a second processing circuitry to execute instructions to perform operations for a redundant clock manager, the redundant clock manager to take over operations for the clock manager in response to the alert from the detector. Other embodiments are described and claimed.
1 . An apparatus, comprising:
a clock circuitry to manage a clock for a device;
a first processing circuitry coupled to the clock circuitry, the first processing circuitry to execute instructions to perform operations for a clock manager, the clock manager to receive messages with time information for a network and generate clock manager control information to adjust the clock to a network time for the network;
a hardened execution environment coupled to the clock circuitry and the first processing circuitry, the hardened execution environment to comprise:
a detector to monitor the clock manager and generate an alert when the detector identifies abnormal behavior of the clock manager based on predictions of the clock manager control information; and
a second processing circuitry to execute instructions to perform operations for a redundant clock manager, the redundant clock manager to generate model control information based on a clock manager model comprising an analytical model representing a behavior of the clock manager, the redundant clock manager to take over the operations for the clock manager in response to the alert from the detector; and
wherein the first processing circuitry and the second processing circuitry are co-located on the device.
2 . The apparatus of claim 1 , wherein the hardened execution environment comprises a secure trusted platform module (TPM) or trusted computing base (TCB) hardware platform.
3 . The apparatus of claim 1 , the hardened execution environment to comprise a clock interface for the clock circuitry.
4 . The apparatus of claim 1 , the hardened execution environment to comprise a clock manager application program interface (API) for an application execution environment.
5 . The apparatus of claim 1 , the hardened execution environment to comprise an actuation router to switch from a first connection between the first processing circuitry to execute the instructions for the clock manager and the clock circuitry to a second connection between the second processing circuitry to execute instructions for the redundant clock manager and the clock circuitry.
6 . The apparatus of claim 1 , the hardened execution environment to comprise an application program interface (API) router to switch from a first connection between the first processing circuitry to execute the instructions for the clock manager and an application execution environment to a second connection between the second processing circuitry to execute instructions for the redundant clock manager and the application execution environment.
7 . The apparatus of claim 1 , the redundant clock manager to comprise a clock servo model, the clock servo model to comprise a clock manager estimator and the clock manager model, the clock manager estimator to receive an input message with time information for a network, generate model control information based on the clock manager model, and output model clock manager control information based on the model control information to the clock circuitry.
8 . The apparatus of claim 1 , the clock manager model to comprise a physics-based analytical model to represent physical relationships between components of a system.
9 . The apparatus of claim 1 , the redundant clock manager to generate model control information based on a clock manager model, wherein the clock manager model is an equation-based representation of a proportional-integral (PI) controller.
10 . A computing-implemented method, comprising:
managing, by clock circuitry, a clock for a device in a network;
receiving, by a network interface, messages with time information for the network;
generating, by a clock manager executing on a first processing circuit, clock manager control information based on the time information for the network, the clock manager control information to adjust the clock to a network time for the network;
detecting abnormal behavior of the clock manager indicative of a security attack based on predictions of the clock manager control information;
switching a first connection path between the clock manager and the clock to a second connection path between a redundant clock manager and the clock, the redundant clock manager executing on a second processing circuit different from the first processing circuit, wherein the first processing circuitry and the second processing circuitry are co-located on the device; and
generating, by the redundant clock manager, model clock manager control information based on a clock manager model comprising an analytical model representing a behavior of the clock manager, the model clock manager control information to adjust the clock to the network time for the network.
11 . The computing-implemented method of claim 10 , wherein the clock manager model to comprise a physics-based analytical model to represent physical relationships between components of a system, and output the model clock manager control information based on the model control information.
12 . The computing-implemented method of claim 10 , wherein the second processing circuit is part of a hardened execution environment that comprises a secure trusted platform module (TPM) or trusted computing base (TCB) hardware platform.
13 . The computing-implemented method of claim 10 , wherein the second processing circuit is part of a hardened execution environment that comprises a clock interface for the clock circuitry.
14 . The computing-implemented method of claim 10 , wherein the second processing circuit is part of a hardened execution environment that comprises a clock manager application program interface (API) for an application execution environment.
15 . The computing-implemented method of claim 10 , comprising switching from a first connection between the first processing circuitry to execute instructions for the clock manager and the clock circuitry to a second connection between the second processing circuitry to execute instructions for the redundant clock manager and the clock circuitry.
16 . The computing-implemented method of claim 10 , comprising switching from a first connection between the first processing circuitry to execute instructions for the clock manager and an application execution environment to a second connection between the second processing circuitry to execute instructions for the redundant clock manager and the application execution environment.
17 . A non-transitory computer-readable storage medium, the computer-readable storage medium including instructions that when executed by a computer, cause the computer to:
manage a clock for a device in a network;
receive messages with time information for the network;
generate, by a clock manager executing on a first processing circuit, clock manager control information based on the time information for the network, the clock manager control information to adjust the clock to a network time for the network;
detect abnormal behavior of the clock manager indicative of a security attack based on predictions of the clock manager control information;
switch a first connection path between the clock manager and the clock to a second connection path between a redundant clock manager and the clock, the redundant clock manager executing on a second processing circuit different from the first processing circuit, wherein the first processing circuitry and the second processing circuitry are co-located on the device; and
generate, by the redundant clock manager, model clock manager control information based on a clock manager model comprising an analytical model representing a behavior of the clock manager, the model clock manager control information to adjust the clock to the network time for the network.
18 . The computer-readable storage medium of claim 17 , wherein the clock manager model to comprise a physics-based analytical model to represent physical relationships between components of a system, and output the model clock manager control information based on the model control information.
19 . The computer-readable storage medium of claim 17 , comprising instructions that when executed by a computer, cause the computer to switch from a first connection between the first processing circuitry to execute instructions for the clock manager and the clock circuitry to a second connection between the second processing circuitry to execute instructions for the redundant clock manager and the clock circuitry.
20 . The computer-readable storage medium of claim 17 , comprising instructions that when executed by a computer, cause the computer to switch from a first connection between the first processing circuitry to execute instructions for the clock manager and an application execution environment to a second connection between the second processing circuitry to execute instructions for the redundant clock manager and the application execution environment.