SOLID-STATE OPTICAL STORAGE DEVICE
A semiconductor device includes a floating gate that can be charged in a nonvolatile manner. The floating gate is also structured as an optical waveguide, and may be optically coupled to a photonic circuit, such as an interferometer.
1 . A nonvolatile memory comprising:
an array of nonvolatile charge storage cells, each nonvolatile charge storage cell comprising:
a source gate;
a control gate;
a silicon substrate defining:
a first wing;
a second wing; and
a first waveguide between the first wing and the second wing, the first waveguide configured to accumulate and retain electrical charge supplied by the source gate in response to a voltage applied to the control gate, the first waveguide defining:
an optical input; and
an optical output; and
a second waveguide optically coupled to the first waveguide and conductively decoupled from the silicon substrate, the source gate, and the control gate.
2 . The nonvolatile memory of claim 1 , the first wing comprising an elevated portion separated from the source gate by an insulator layer.
3 . The nonvolatile memory of claim 2 , wherein:
the insulator layer is a first insulator layer;
the elevated portion is a first elevated portion; and
the second wing comprises a second elevated portion separated from the control gate by a second insulator layer.
4 . The nonvolatile memory of claim 1 , comprising an isolation coupler optically coupling the second waveguide to the first waveguide and conductively decoupling the second waveguide form the first waveguide.
5 . The nonvolatile memory of claim 4 , wherein the isolation coupler comprises a tapered region.
6 . The nonvolatile memory of claim 4 , wherein the isolation coupler comprises a gap.
7 . The nonvolatile memory of claim 1 , comprising a first isolation coupler optically coupling the second waveguide to the first waveguide and a second isolation coupler optically coupling the first waveguide to a third waveguide.
8 . The nonvolatile memory of claim 1 , comprising an electrode positioned adjacent to the first waveguide.
9 . The nonvolatile memory of claim 8 , wherein the electrode is disposed below the first waveguide.
10 . The nonvolatile memory of claim 8 , wherein a voltage applied to the electrode attracts charge accumulated in the first waveguide toward the electrode.
11 . The nonvolatile memory of claim 1 , comprising an implant disposed adjacent to the first waveguide so as to influence a charge distribution of charge accumulated in the first waveguide.
12 . A nonvolatile memory for a photonic circuit, the nonvolatile memory comprising:
an optical input;
an optical output;
a floating gate waveguide;
a control gate;
a source gate;
a first isolation coupler optically coupling the optical input to the floating gate waveguide, the first isolation coupler conductively decoupling the floating gate waveguide from the optical input; and
a second isolation coupler optically coupling the floating gate waveguide to the optical output, the second isolation coupler conductively decoupling the floating gate waveguide from the optical input; wherein the floating gate waveguide is configured to accumulate and retain electrical charge supplied by the source gate in response to a voltage applied to the control gate.
13 . The nonvolatile memory of claim 12 , wherein the floating gate waveguide is a portion of an interferometer or a resonator.
14 . The nonvolatile memory of claim 13 , wherein accumulated charge in the floating gate waveguide influences a behavior of the interferometer or the resonator.
15 . The nonvolatile memory of claim 12 , wherein the first isolation coupler comprises a gap.
16 . The nonvolatile memory of claim 12 , wherein the second isolation coupler comprises a tapered gap.
17 . The nonvolatile memory of claim 12 , wherein the floating gate waveguide is formed from a semiconductor.
18 . A nonvolatile memory for a photonic circuit, the nonvolatile memory comprising:
a floating gate waveguide;
a control gate;
a source gate;
a first isolation coupler conductively isolating the floating gate waveguide from the control gate and the source gate; and
a second isolation coupler conductively isolating the floating gate waveguide from the control gate and the source gate; wherein the floating gate waveguide is configured to accumulate and retain electrical charge supplied by the source gate in response to a voltage applied to the control gate.
19 . The nonvolatile memory of claim 18 , wherein the floating gate waveguide is formed from a semiconductor material.
20 . The nonvolatile memory of claim 18 , wherein the floating gate waveguide is optically coupled to a photonic circuit.