Memory structure
A memory structure including a substrate, a first dielectric layer, a second dielectric layer, a charge storage layer, an oxide layer, and a conductive layer is provided. The first dielectric layer is disposed on the substrate. The second dielectric layer is disposed on the first dielectric layer. The charge storage layer is disposed between the first dielectric layer and the second dielectric layer. The oxide layer is located at two ends of the charge storage layer and is disposed between the first dielectric layer and the second dielectric layer. The conductive layer is disposed on the second dielectric layer.
1. A memory structure, comprising:
a substrate;
a first dielectric layer disposed on the substrate;
a second dielectric layer disposed on the first dielectric layer;
a charge storage layer disposed between the first dielectric layer and the second dielectric layer;
an oxide layer located at two ends of the charge storage layer and disposed between the first dielectric layer and the second dielectric layer;
a conductive layer disposed on the second dielectric layer; and
an isolation structure located in the substrate, wherein an upper surface of the isolation structure has a recess, and the recess is adjacent to the substrate.
2. The memory structure according to claim 1 , wherein the oxide layer is connected between a bottom surface of the second dielectric layer and a top surface of the first dielectric layer.
3. The memory structure according to claim 1 , wherein the first dielectric layer, the second dielectric layer, and the oxide layer surround the charge storage layer.
4. The memory structure according to claim 1 , wherein the conductive layer covers a sidewall of the oxide layer.
5. The memory structure according to claim 1 , wherein a material of the first dielectric layer comprises oxide, a material of the second dielectric layer comprises oxide, and a material of the charge storage layer comprises nitride.
6. The memory structure according to claim 1 , wherein the oxide layer is located above the isolation structure.
7. The memory structure according to claim 1 , wherein a portion of the first dielectric layer, a portion of the charge storage layer, and a portion of the second dielectric layer are located above the isolation structure.