IP Library › Granted Patent US 11,874,502
Granted Patent B2
US 11,874,502 · App. 17/991,262 · Granted Jan 16, 2024

Modular assembly for opto-electronic systems

Inventors: Po Dong (Cupertino, CA); Juthika Basak (San Jose, CA); Jiashu Chen (Los Altos, CA)
Assignee: II-VI DELAWARE, INC.
G02B6/30G02B6/421G02B6/4249G02B6/4274
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Quick Facts
Patent No.
US 11,874,502
App. No.
17/991,262
Granted
Jan 16, 2024
Kind
B2
Abstract

A modular assembly for opto-electronic systems has a substrate on which various photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips are mounted. One or more waveguide (WG) chips mounted on the substrate align the optical communication between the PIC chips and fiber blocks for optical fibers. Preconfigured electrical connections in the substrate allow the PIC and EIC chips to communicate with one another and to communicate with solder bumps on the substrate for integration of the modular assembly with other electronic components.

Claims (35)

1. A system integrating a fiber block and a photonic integrated circuit (PIC) chip, the system comprising:

a waveguide (WG) chip disposed between the fiber block and the PIC chip, the WG chip having a plurality of waveguides configured to transmit optical signals,

wherein:

the WG chip includes a first facet comprising a first light coupling surface providing a first light coupling with the fiber block by the plurality of waveguides and a second facet having a second light coupling surface providing a second light coupling with the PIC chip by the plurality of waveguides,

the plurality of waveguides of the WG chip are configured to be butt-coupled to waveguides embedded between upper and lower surfaces of the PIC chip at the second light coupling surface,

each of the plurality of waveguides includes a first end disposed at the first light coupling surface and a second end disposed at the second light coupling surface, and

the first ends of the plurality of waveguides are disposed at a middle of the first light coupling surface and the second ends of the plurality of waveguides are disposed at a bottom of the second light coupling surface.

2. The system according to claim 1 , wherein one or more of the plurality of waveguides transmit the optical signals between the fiber block and the PIC chip.

3. The system according to claim 1 , wherein the plurality of waveguides each comprise a refractive index that is different from a body of the WG chip.

4. The system according to claim 1 , wherein the PIC chip and the WG chip are mounted on a first surface of a substrate.

5. The system according to claim 4 , wherein the second light coupling surface overlaps with the first surface of the substrate and extends along a direction perpendicular to the first surface of the substrate.

6. The system according to claim 1 , wherein at least one of the first light coupling and the second light coupling comprises one of a butt-coupling, an evanescent coupling, and a radiative coupling.

7. A system integrating a fiber block and a photonic integrated circuit (PIC) chip, the system comprising:

a waveguide (WG) chip disposed between the fiber block and the PIC chip, the WG chip having a plurality of waveguides configured to transmit optical signals,

wherein:

the WG chip includes a first facet comprising a first light coupling surface providing a first light coupling with the fiber block by the plurality of waveguides and a second facet having a second light coupling surface providing a second light coupling with the PIC chip by the plurality of waveguides,

the plurality of waveguides of the WG chip are configured to be butt-coupled to waveguides embedded between upper and lower surfaces of the PIC chip at the second light coupling surface,

the PIC chip and the WG chip are mounted on a first surface of a substrate, and

a bottom surface of the WG chip comprises an array of solder bumps configured to align with an array of solder bumps provided on the first surface of the substrate.

8. The system according to claim 1 , wherein the optical signals are transmitted between the fiber block and the PIC chip, and through the WG chip.

9. The system according to claim 1 , wherein the WG chip includes an alignment feature configured to enable passive fiber attachment between the PIC chip and optical fibers of the fiber block.

10. The system according to claim 7 , wherein the plurality of waveguides each comprise a refractive index that is different from a body of the WG chip.

11. The system according to claim 7 , wherein the second light coupling surface overlaps with the first surface of the substrate and extends along a direction perpendicular to the first surface of the substrate.

12. The system according to claim 7 , wherein at least one of the first light coupling and the second light coupling comprises one of a butt-coupling, an evanescent coupling, and a radiative coupling.

13. A system integrating a fiber block and a photonic integrated circuit (PIC) chip, the system comprising:

a waveguide (WG) chip disposed between the fiber block and the PIC chip, the WG chip having a plurality of waveguides disposed between a top side and a bottom side of the WG chip and configured to transmit optical signals,

wherein each of the plurality of waveguides includes a first end exposed at a first light coupling surface adjacent to the fiber block at a first level between the top side and the bottom side of the WG chip and a second end exposed at a second light coupling surface adjacent the PIC chip at a second level between the top side and the bottom side of the WG chip, and

wherein the first level is different than the second level.

14. The system according to claim 13 , wherein one or more of the plurality of waveguides transmit the optical signals between the fiber block and the PIC chip.

15. The system according to claim 13 , wherein the plurality of waveguides each comprise a refractive index that is different from a body of the WG chip.

16. The system according to claim 13 , wherein the PIC chip and the bottom side of the WG chip are mounted on a first surface of a substrate.

17. The system according to claim 16 , wherein the bottom side of the WG chip comprises an array of solder bumps configured to align with an array of solder bumps provided on the first surface of the substrate.

18. The system according to claim 16 , wherein the second light coupling surface overlaps with the first surface of the substrate and extends along a direction perpendicular to the first surface of the substrate.

19. The system according to claim 13 , wherein the plurality of waveguides of the WG chip are configured to be butt-coupled to waveguides embedded between upper and lower surfaces of the PIC chip at the second light coupling surface.

20. The system according to claim 13 , wherein the WG chip includes an alignment feature configured to enable passive fiber attachment between the PIC chip and optical fibers of the fiber block.

Assignments (2)
SECURITY INTEREST Recorded Oct 6, 2025
From: II-VI DELAWARE, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 072853/0806 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2022
From: DONG, PO; BASAK, JUTHIKA; CHEN, JIASHU
To: II-VI DELAWARE, INC.
Reel/Frame 061912/0944 →
Continuity (2)
Division 17097250 · Nov 13, 2020
Related Publication 20230088198A1 · Mar 23, 2023