IP Library › Granted Patent US 12,028,457
Granted Patent B2
US 12,028,457 · App. 17/991,750 · Granted Jul 2, 2024

Zero knowledge prover

Inventors: Jeremy Bruestle (Seattle, WA); Brian Retford (Seattle, WA); Frank Laub (Seattle, WA)
H04L9/3218G06F11/3636G06F21/52G06F2221/033
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Quick Facts
Patent No.
US 12,028,457
App. No.
17/991,750
Filed
Nov 21, 2022
Granted
Jul 2, 2024
Kind
B2
Art Unit
2192
USPC
717/128
Abstract

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for implementing a zero knowledge prover are disclosed. In one aspect, a method includes the actions of executing a software program. The method further includes storing an execution trace that includes, for each address in memory, a value at each clock cycle during execution of the software program. The method further includes generating a sorted execution trace by sorting the execution trace. The method further includes determining a constraint for given values in the memory at adjacent clock cycles. The method further includes determining whether the sorted execution trace complies with the constraint and whether the sorted execution trace is a permutation of the execution trace. The method further includes providing, for output, data indicating whether the software program executed correctly while preventing outputting data included in the execution trace or the sorted execution trace.

Claims (58)

1. A computer-implemented method, comprising:

executing, by one or more processors, a software program;

storing, by the one or more processors, an execution trace that includes, for each address in memory, a value at each clock cycle during execution of the software program;

generating, by the one or more processors, a sorted execution trace by sorting the execution trace in order of addresses in the memory and each address in the memory in order of execution;

determining, by the one or more processors, a constraint for given values in the memory at adjacent clock cycles;

determining, by the one or more processors, whether the sorted execution trace complies with the constraint;

determining, by the one or more processors, whether the sorted execution trace is a permutation of the execution trace; and

based on determining whether the sorted execution trace complies with the constraint and whether the sorted execution trace is a permutation of the execution trace, providing, for output by the one or more processors, data indicating whether the software program executed correctly while preventing outputting data included in the execution trace or the sorted execution trace.

2. The method of claim 1 , wherein determining whether the sorted execution trace complies with the constraint comprises:

determining that a threshold number of values in the sorted execution trace complies with the constraint.

3. The method of claim 1 , wherein the constraint is a polynomial constraint.

4. The method of claim 1 , wherein determining whether the sorted execution trace is the permutation of the execution trace comprises:

determining that a threshold number of values in the sorted execution trace are permutations of the threshold number of values in the execution trace.

5. The method of claim 1 , wherein the one or more processors are included in a computing device with a von Neumann architecture.

6. The method of claim 1 , comprising:

preventing, by the one or more processors, a computing device from determining the values in the memory.

7. The method of claim 1 , wherein:

executing the software program comprises providing an input to the software program, and

the method comprises maintaining the input as private data by preventing outputting the input to the software program.

8. A system, comprising:

one or more processors; and

memory including a plurality of computer-executable components that are executable by the one or more processors to perform a plurality of actions, the plurality of actions comprising:

executing, by the one or more processors, a software program;

storing, by the one or more processors, an execution trace that includes, for each address in memory, a value at each clock cycle during execution of the software program;

generating, by the one or more processors, a sorted execution trace by sorting the execution trace in order of addresses in the memory and each address in the memory in order of execution;

determining, by the one or more processors, a constraint for given values in the memory at adjacent clock cycles;

determining, by the one or more processors, whether the sorted execution trace complies with the constraint;

determining, by the one or more processors, whether the sorted execution trace is a permutation of the execution trace; and

based on determining whether the sorted execution trace complies with the constraint and whether the sorted execution trace is a permutation of the execution trace, providing, for output by the one or more processors, data indicating whether the software program executed correctly while preventing outputting data included in the execution trace or the sorted execution trace.

9. The system of claim 8 , wherein determining whether the sorted execution trace complies with the constraint comprises:

determining that a threshold number of values in the sorted execution trace complies with the constraint.

10. The system of claim 8 , wherein the constraint is a polynomial constraint.

11. The system of claim 8 , wherein determining whether the sorted execution trace is the permutation of the execution trace comprises:

determining that a threshold number of values in the sorted execution trace are permutations of the threshold number of values in the execution trace.

12. The system of claim 8 , wherein the system has a von Neumann architecture.

13. The system of claim 8 , wherein the actions comprise:

preventing, by the one or more processors, a computing device from determining the values in the memory.

14. The system of claim 8 , wherein:

executing the software program comprises providing an input to the software program, and

the actions comprise maintaining the input as private data by preventing outputting the input to the software program.

15. One or more non-transitory computer-readable media of a computing device storing computer-executable instructions that upon execution cause one or more computers to perform acts comprising:

executing, by the one or more computers, a software program;

storing, by the one or more computers, an execution trace that includes, for each address in memory, a value at each clock cycle during execution of the software program;

generating, by the one or more computers, a sorted execution trace by sorting the execution trace in order of addresses in the memory and each address in the memory in order of execution;

determining, by the one or more computers, a constraint for given values in the memory at adjacent clock cycles;

determining, by the one or more computers, whether the sorted execution trace complies with the constraint;

determining, by the one or more computers, whether the sorted execution trace is a permutation of the execution trace; and

based on determining whether the sorted execution trace complies with the constraint and whether the sorted execution trace is a permutation of the execution trace, providing, for output by the one or more computers, data indicating whether the software program executed correctly while preventing outputting data included in the execution trace or the sorted execution trace.

16. The media of claim 15 , wherein determining whether the sorted execution trace complies with the constraint comprises:

determining that a threshold number of values in the sorted execution trace complies with the constraint.

17. The media of claim 15 , wherein the constraint is a polynomial constraint.

18. The media of claim 15 , wherein determining whether the sorted execution trace is the permutation of the execution trace comprises:

determining that a threshold number of values in the sorted execution trace are permutations of the threshold number of values in the execution trace.

19. The media of claim 15 , wherein the acts comprise:

preventing, by the one or more processors, an additional computing device from determining the values in the memory.

20. The media of claim 15 , wherein:

executing the software program comprises providing an input to the software program, and

the acts comprise maintaining the input as private data by preventing outputting the input to the software program.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2022
From: BRUESTLE, JEREMY; RETFORD, BRIAN; LAUB, FRANK
To: RISC ZERO, INC.
Reel/Frame 061846/0668 →
Continuity (2)
Provisional Application 63311809 · Feb 18, 2022
Related Publication 20230269082A1 · Aug 24, 2023
Cited By (1)
US 12,519,646