Granted Patent B2

US 12,558,030 · App. 17/991,924 · Granted Feb 24, 2026

Inventors: Joseph Zott (Menlo Park, CA); Fred Wood (Medford, NY); Dmitriy Yavid (Stony Brook, NY); Seung P. Kim (San Francisco, CA); Klaus Zietlow (Piedmont, CA)

Assignee: AccuVein Inc.

A61B5/489A61B5/0033A61B5/0062A61B5/0082A61B5/743A61B2090/366A61M5/427G02B26/101

Abstract

Claims (20)

1 . A vein imaging device configured to obtain and project an image of subcutaneous veins onto a patient to overlie the imaged veins, said vein imaging device comprising:

a first laser configured to emit a beam of light at an infrared wavelength;

a second laser configured to emit a beam of light at a red wavelength;

an x-mirror;

an x-mirror driver;

a y-mirror;

a y-mirror driver;

a field programmable gate array (FPGA), said FPGA configured to control said x-mirror driver and said y-mirror driver to control said first laser, said second laser, said x-mirror and said y-mirror to selectively scan each of said beam of light at said infrared wavelength and said beam of light at said red wavelength onto the patient in a first and a second direction, to form respective lines in said first and second directions, and to scan said lines in a third direction and a fourth direction to thereby form a pattern of said infrared wavelength of light;

wherein said FPGA is further configured to receive feedback of a state of said first laser and a state of said second laser, to form a closed loop to control an output of said first laser and an output of said second laser;

a photodiode configured to receive a vein image formed from said scanned pattern of said infrared wavelength of light, and further configured to convert the received vein image into an analog signal;

a front end circuit, said front end circuit configured to provide analog filtering, and gain control of the analog signal;

an analog to digital converter (ADC), said ADC configured to convert the analog signal to a digital signal;

wherein said FPGA is further configured to receive the digital signal and to perform normal vein image processing of an image frame of said received vein image, said normal vein image processing comprising:

said FPGA being configured to collect pixel data from said photodiode, to perform an X-direction sum of pixel data for a plurality of boundary windows comprising a five by five matrix of pixels and to place said X-direction sum into an X-sum buffer, to perform a Y-direction sum of pixel data for said plurality of boundary windows, and to place said Y-direction sum into a Y-sum buffer, and to use a total sum generator to obtain a box filter output for each of said plurality of windows being the X-sum buffer added to the Y-sum buffer;

wherein said FPGA is further configured to control said x-mirror driver and said y-mirror driver to control said first laser, said second laser, said x-mirror and said y-mirror to scan said red wavelength within said beam for projection of said processed vein image onto the patient; and

wherein said FPGA is further configured to control said front end circuit to set said analog filtering and gain.

2 . The imaging device according to claim 1 , wherein said FPGA is further configured for boundary image processing, wherein a portion of one or more of said plurality of boundary windows extends beyond said image frame.

3 . The imaging device according to claim 2 , further comprising a pixel clock configured to time sequentially store said image in said FPGA.

4 . The imaging device according to claim 3 , further comprising:

a pixel clock.

Assignments (1)

Continuity (6)

References Cited (328)