IP Library Granted Patent US 12,292,841
Granted Patent B2
US 12,292,841 · App. 18/012,235 · Granted May 6, 2025

Data processing method and apparatus of AI chip and computer device

Inventors: Kuen Hung Tsoi (Guangdong, CN); Xinyu Niu (Guangdong, CN)
Assignee: Shenzhen Corerain Technologies Co., Ltd.
G06F13/16G06N3/02
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Quick Facts
Patent No.
US 12,292,841
App. No.
18/012,235
Granted
May 6, 2025
Kind
B2
Abstract

The embodiments of the present application provide a data processing method and apparatus of an AI chip and a computer device. The data processing method of the AI chip includes: determining a target AI model for processing data to be processed; matching, in the AI chip, a data flow network corresponding to the target AI model and a data flow direction of the data flow network; and processing the data to be processed based on the data flow network and the data flow direction.

Claims (27)

1. A data processing method of an artificial intelligence (AI) chip, comprising:

configuring a plurality of data flow switches and a plurality of computation modules corresponding to a plurality of AI models in the AI chip, one of the plurality of data flow switches being arranged between every two adjacent computation modules of the AI chip;

determining a target AI model from the plurality of AI models for processing data to be processed;

matching, in the AI chip, a data flow network corresponding to the target AI model and a data flow direction of the data flow network, the matching comprising:

connecting corresponding ones of the plurality of computation modules corresponding to the target AI model to form the data flow network; and

determining a computation sequence of the corresponding ones of the plurality of computation modules to form the data flow direction; and

processing the data to be processed based on the data flow network and the data flow direction, the processing comprising:

determining a target data flow switch in the data flow network; and

controlling the target data flow switch to be in a switched-on state, so that the data to be processed flows in the data flow network according to the data flow direction, and is processed by the corresponding ones of the plurality of computation modules in the data flow network in a flow process.

2. The method according to claim 1 , wherein the step of matching, in the AI chip, a data flow network corresponding to the target AI model and a data flow direction of the data flow network further comprises:

determining a target flow diagram corresponding to the target AI model;

determining a plurality of computation nodes in the target flow diagram and a computation sequence of the plurality of computation nodes; and

matching, in the AI chip, a target computation module corresponding to each computation node to obtain the corresponding ones of the plurality of computation modules.

3. The method according to claim 2 , wherein the data flow direction is determined by:

determining the computation sequence of the corresponding ones of the plurality of computation modules based on the computation sequence of the plurality of computation nodes; and

taking the computation sequence of the corresponding ones of the plurality of computation modules as the data flow direction.

4. The method according to claim 2 , wherein the AI chip further comprises a storage module configured to store the data to be processed, the storage module comprises a first storage module, the AI chip further comprises at least two first sub-target computation modules, each first sub-target computation module comprises at least one target computation module, and the first storage module is arranged between two adjacent first sub-target computation modules;

when computation of a previous first sub-target computation module is completed and computation of a next first sub-target computation module is not completed, the first storage module stores a computation result of the previous first sub-target computation module; and when the computation of the next first sub-target computation module is completed, the first storage module transmits the computation result of the previous first sub-target computation module to the next first sub-target computation module.

5. The method according to claim 2 , wherein the AI chip further comprises a storage module configured to store the data to be processed, the storage module comprises a second storage module, the AI chip further comprises at least two second sub-target computation modules, each second sub-target computation module comprises at least two target computation modules connected with one second storage module, and the at least two second sub-target computation modules receive the data to be processed through one second storage module; and the method further comprises:

copying same data required by the at least two second sub-target computation modules in the data to be processed in the second storage module to obtain at least two copies of the same data, and respectively transmitting the at least two copies of the same data to the at least two second sub-target computation modules.

6. The method according to claim 1 , wherein the target AI model comprises a first AI model and a second AI model, and the step of matching, in the AI chip, a data flow network corresponding to the target AI model and a data flow direction comprises:

in response to determining the target AI model as the first AI model, matching, in the AI chip, a data flow network corresponding to the first AI model and a corresponding data flow direction; and

in response to determining the target AI model as the second AI model, matching, in the AI chip, a data flow network corresponding to the second AI model and a corresponding data flow direction.

7. A computer device, comprising:

one or a plurality of processors; and

a storage device, configured to store one or a plurality of computer programs, wherein

when the one or the plurality of computer programs are executed by the one or the plurality of processors, the one or the plurality of processors implement the data processing method of the AI chip according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2022
From: TSOI, KUEN HUNG; NIU, XINYU
To: SHENZHEN CORERAIN TECHNOLOGIES CO., LTD.
Reel/Frame 062179/0761 →
Priority Claims (1)
CN 202010575769.1 · Jun 22, 2020 · national
Continuity (1)
Related Publication 20230251979A1 · Aug 10, 2023
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