IP Library › Granted Patent US 12,353,346
Granted Patent B2
US 12,353,346 · App. 18/016,945 · Granted Jul 8, 2025

Near-memory computing module and method, near-memory computing network and construction method

Inventors: Xiping Jiang (Xi'an, CN); Xiaofeng Zhou (Xi'an, CN); Fengguo Zuo (Xi'an, CN)
Assignee: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
G06F13/4022G06F13/1668
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Quick Facts
Patent No.
US 12,353,346
App. No.
18/016,945
Granted
Jul 8, 2025
Kind
B2
Abstract

Provided are a near-memory computing module and method, a near-memory computing network, and a construction method. The near-memory computing module employs a three-dimensional design, computing submodules and a memory submodule are provided in different layers, the layers are connected by means of bonding, and the total data bit width connected is a positive integer multiple of the data bit width of a single computing unit ( 201 ). Multiple memory units ( 203 ) are provided in the memory submodule, thus allowing a large memory capacity to be implemented in a single memory submodule. Computing units of the computing submodule exchange data with each other via an exchange interface of a router ( 202 ); moreover, among the computing submodules data is accessed via a routing interface. The near-memory computing network utilizes the near-memory computing module and satisfies computing requirements of different scales.

Claims (70)

1. A near-memory computing module, comprising:

a computing submodule, which comprises a plurality of computing units; and

at least one memory submodule, which is arranged on at least one side of the computing submodule, wherein each memory submodule comprises a plurality of memory units, and each memory submodule is connected to the computing submodule;

wherein the computing submodule and the at least one memory submodule are located in the same chip,

wherein the computing submodule further comprises a routing unit,

wherein the routing unit is connected to each computing unit, the routing unit is connected to each memory unit of each memory submodule, and the routing unit is connected to a routing unit of at least one further near-memory computing module, and

wherein the routing unit is configured to perform access of a first computing unit of the near-memory computing module to a second computing unit of the near-memory computing module, or access to a first memory unit of the near-memory computing module, or access to a third computing unit or a second memory unit of at least one further near-memory computing module.

2. The near-memory computing module according to claim 1 , wherein the routing unit comprises:

a plurality of switching interfaces, which connects the routing unit to each computing unit;

a routing interface, which connects the routing unit to a routing interface of a routing unit of at least one further near-memory computing module; and

a memory control interface, which connects the routing unit to each memory unit in each memory submodule.

3. The near-memory computing module according to claim 2 , wherein the routing unit further comprises:

a crossbar switch unit;

a switching routing computing unit, wherein the switching routing computing unit is connected to the plurality of switching interfaces, the routing interface, and the crossbar switch unit, wherein the switching routing computing unit stores at least routing information about the near-memory computing module and the plurality of computing units, and wherein the switching routing computing unit parses a received data access request and controls switching of the crossbar switch unit based on parsed data access request;

a memory control unit, wherein the memory control unit is connected to the crossbar switch unit and the memory control interface, wherein the memory control unit stores at least routing information about the plurality of memory units, and wherein the memory control unit, in response to the switching of the crossbar switch unit to the memory control unit, performs secondary parse of the parsed data access request received from the crossbar switch unit to determine a destination memory unit, and accesses the destination memory unit via the memory control interface.

4. The near-memory computing module according to claim 1 , wherein each computing unit accesses at least one memory unit directly via the routing unit.

5. A near-memory computing module, comprising:

a computing submodule, which comprises a plurality of computing units;

at least one memory submodule, which is arranged on at least one side of the computing submodule, wherein each memory submodule comprises a plurality of memory units, and each memory submodule is connected to the computing submodule;

wherein the computing submodule and the at least one memory submodule are located in the same chip;

wherein the computing submodule further comprises at least two routing units, each of which is connected to at least one computing unit, and each of which is connected to at least one memory unit of each memory submodule;

wherein the at least two routing units are connected to each other to form an overall routing unit, wherein the overall routing unit is connected to each computing unit, and is connected to each memory unit of each memory submodule, and is connected to at least one further routing unit of at least one further near-memory computing module;

wherein the overall routing unit is configured to perform an access of a first computing unit of the near-memory computing module to a second computing unit of the near-memory computing module, or access to a first memory unit of the near-memory computing module, or access to a third computing unit or a second memory unit of at least one further near-memory computing module.

6. The near-memory computing module according to claim 5 , wherein each of the at least two routing units comprises:

a plurality of switching interfaces, which connect the routing unit to at least one computing unit;

a routing interface, which connects the routing unit to at least one further routing unit of the near-memory computing module, and/or which connects the routing unit to at least one further routing unit of at least one further near-memory computing module;

a memory control interface, which connects the routing unit to at least one memory unit.

7. The near-memory computing module according to claim 6 , wherein the at least two routing units are connected to each other via a routing interface.

8. The near-memory computing module according to claim 6 , wherein each of the at least two routing units further comprises:

a crossbar switch unit;

a switching routing computing unit, wherein the switching routing computing unit is connected to the plurality of switching interfaces, the routing interface, and the crossbar switch unit, wherein the switching routing computing unit stores at least routing information about the near-memory computing module and the plurality of computing units, and wherein the switching routing computing unit parses a received data access request and controls switching of the crossbar switch unit based on parsed data access request;

a memory control unit, wherein the memory control unit is connected to the crossbar switch unit and the memory control interface, wherein the memory control unit stores at least routing information about the plurality of memory units, and wherein the memory control unit, in response to switching of the crossbar switch unit to the memory control unit, performs secondary parsing of the parsed data access request received from the crossbar switch unit to determine the memory unit to be accessed, and accesses the memory unit to be accessed via the memory control interface.

9. The near-memory computing module according to claim 5 , wherein each computing unit accesses at least one memory unit directly via the overall routing unit.

10. The near-memory computing module according to claim 5 , wherein in the computing submodule, the at least two routing units are located at the center, and the plurality of computing units are distributed around the at least two routing units.

11. A near-memory computing method, which is used for a near-memory computing module, wherein the near-memory computing module comprises: a computing submodule, which comprises a plurality of computing units and a routing unit, wherein the routing unit is connected to each computing unit, the routing unit is connected to each memory unit of each memory submodule, and the routing unit is connected to a routing unit of at least one further near-memory computing module; at least one memory submodule, which is arranged on at least one side of the computing submodule, wherein each memory submodule comprises a plurality of memory units, and each memory submodule is connected to the computing submodule; wherein the computing submodule and the at least one memory submodule are located in the same chip; wherein the near-memory computing method comprising the following steps carried out by a routing unit:

receiving a data access request, wherein the data access request is issued by a first computing unit and includes at least an address of a destination memory unit; and,

parsing the data access request, acquiring access data from the destination memory unit, and forwarding the access data to the first computing unit.

12. The near-memory computing method according to claim 11 , further comprising the following steps carried out by the routing unit connected to the first computing unit:

after the routing unit parses the data access request and before the routing unit acquires access data from the destination memory unit, judging whether the first computing unit can access the destination memory unit directly via the routing unit connected to the first computing unit;

under the condition that the first computing unit can access the destination memory unit directly via the routing unit connected to the first computing unit, acquiring access data directly from the destination memory unit and forwarding the access data to the first computing unit; and

under the condition that the first computing unit cannot access the destination memory unit directly via the routing unit connected to the first computing unit, forwarding the parsed data access request to a second computing unit, and acquiring access data from the destination memory unit via the second computing unit and forwarding the access data to the first computing unit.

13. The near-memory computing method according to claim 12 , further comprising the following steps carried out by the routing unit connected to the first computing unit:

under the condition that the first computing unit cannot access the destination memory unit directly via the routing unit connected to the first computing unit and before the routing unit connected to the first computing unit forwards the parsed data access request to a second computing unit, judging whether the destination memory unit and the first computing unit are located in the same near-memory computing module;

under the condition that the destination memory unit and the first computing unit are located in the same near-memory computing module, forwarding the parsed data access request directly to a second computing unit, acquiring access data from the destination memory unit via the second computing unit and forwarding the access data to the first computing unit, wherein the second computing unit can access the destination memory unit directly via the routing unit connected to the first computing unit;

under the condition that the destination memory unit and the first computing unit are not located in the same near-memory computing module, forwarding the parsed data access request to a routing unit of at least one further near-memory computing module connected to the routing unit connected to the first computing unit and forwarding to a second computing unit connected to the routing unit of the at least one further near-memory computing module, and acquiring access data from the destination memory unit via the second computing unit and forwarding the access data to the first computing unit, wherein the second computing unit can access the destination memory unit directly via the routing unit of the at least one further near-memory computing module.

14. The near-memory computing method according to claim 11 , the near-memory computing method comprising the following steps carried out by a routing unit:

receiving a data access request, wherein the data access request is issued by a first computing unit and includes at least an address of a destination computing unit; and,

parsing the data access request, acquiring access data from the destination computing unit, and forwarding the access data to the first computing unit; and

wherein the near-memory computing method further comprises the following steps carried out by the routing unit connected to the first computing unit:

after the routing unit parses the data access request and before the routing unit acquires access data from the destination computing unit, judging whether the destination computing unit and the first computing unit are located in the same near-memory computing module;

under the condition that the destination computing unit and the first computing unit are located in the same near-memory computing module, acquiring access data directly from the destination computing unit and forwarding the access data to the first computing unit;

under the condition that the destination computing unit and the first computing unit are not located in the same near-memory computing module, forwarding the parsed data access request to a routing unit of at least one further near-memory computing module connected to the routing unit, and acquiring access data from the destination computing unit via the routing unit of the at least one further near-memory computing module and forwarding the access data to the first computing unit.

15. The near-memory computing method according to claim 11 , wherein the computing submodule further comprises at least two routing units, each of which is connected to at least one computing unit, and each of which is connected to at least one memory unit of each memory submodule; wherein the at least two routing units are connected to each other to form an overall routing unit, wherein the overall routing unit is connected to each computing unit, and is connected to each memory unit of each memory submodule, and is connected to at least one further routing unit of at least one further near-memory computing module; wherein the near-memory computing method comprising the following steps carried out by an overall routing unit:

receiving a data access request, wherein the data access request is issued by a first computing unit and includes at least an address of a destination memory unit; and,

parsing the data access request, acquiring access data from the destination memory unit, and forwarding the access data to the first computing unit.

16. The near-memory computing method according to claim 15 , comprising the following steps carried out by the overall routing unit connected to the first computing unit:

after the overall routing unit parses the data access request and before the overall routing unit acquires access data from the destination memory unit, judging whether the first computing unit can access the destination memory unit directly via the overall routing unit connected to the first computing unit;

under the condition that the first computing unit can access the destination memory unit directly via the overall routing unit connected to the first computing unit, acquiring access data directly from the destination memory unit and forwarding the access data to the first computing unit; and

under the condition that the first computing unit cannot access the destination memory unit directly via the overall routing unit connected to the first computing unit, forwarding the parsed data access request to a second computing unit, and acquiring access data from the destination memory unit via the second computing unit and forwarding the access data to the first computing unit.

17. The near-memory computing method according to claim 16 , comprising the following steps carried out by the overall routing unit connected to the first computing unit:

under the condition that the first computing unit cannot access the destination memory unit directly via the overall routing unit connected to the first computing unit and before the overall routing unit connected to the first computing unit forwards the parsed data access request to a second computing unit, judging whether the destination memory unit and the first computing unit are located in the same near-memory computing module;

under the condition that the destination memory unit and the first computing unit are located in the same near-memory computing module, forwarding the parsed data access request directly to a second computing unit, acquiring access data from the destination memory unit via the second computing unit and forwarding the access data to the first computing unit, wherein the second computing unit can access the destination memory unit directly via the overall routing unit connected to the first computing unit;

under the condition that the destination memory unit and the first computing unit are not located in the same near-memory computing module, forwarding the parsed data access request to an overall routing unit of at least one further near-memory computing module connected to the overall routing unit connected to the first computing unit and forwarding to a second computing unit connected to the overall routing unit of the at least one further near-memory computing module, and acquiring access data from the destination memory unit via the second computing unit and forwarding the access data to the first computing unit, wherein the second computing unit can access the destination memory unit directly via the overall routing unit of the at least one further near-memory computing module.

18. The near-memory computing method according to claim 11 , wherein the computing submodule further comprises at least two routing units, each of which is connected to at least one computing unit, and each of which is connected to at least one memory unit of each memory submodule; wherein the at least two routing units are connected to each other to form an overall routing unit, wherein the overall routing unit is connected to each computing unit, and is connected to each memory unit of each memory submodule, and is connected to at least one further routing unit of at least one further near-memory computing module; wherein the near-memory computing method comprising the following steps carried out by an overall routing unit:

receiving a data access request, wherein the data access request is issued by a first computing unit and includes at least an address of a destination computing unit; and

parsing the data access request, acquiring access data from the destination computing unit, and forwarding the access data to the first computing unit; and

wherein the near-memory computing method further comprises the following steps carried out by the overall routing unit connected to the first computing unit:

after the overall routing unit parses the data access request and before the overall routing unit acquires access data from the destination computing unit, judging whether the destination computing unit and the first computing unit are located in the same near-memory computing module;

under the condition that the destination computing unit and the first computing unit are located in the same near-memory computing module, acquiring access data directly from the destination computing unit and forwarding the access data to the first computing unit; and

under the condition that the destination computing unit and the first computing unit are not located in the same near-memory computing module, forwarding the parsed data access request to an overall routing unit of at least one further near-memory computing module connected to the overall routing unit, and acquiring access data from the destination computing unit via the overall routing unit of the at least one further near-memory computing module and forwarding the access data to the first computing unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: JIANG, XIPING; ZHOU, XIAOFENG; ZUO, FENGGUO
To: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
Reel/Frame 062423/0399 →
Priority Claims (1)
CN 202010753117.2 · Jul 30, 2020 · national
Continuity (1)
Related Publication 20230350827A1 · Nov 2, 2023
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