IP Library Granted Patent US 12,642,090
Granted Patent B2
US 12,642,090 · App. 18/054,229 · Granted May 26, 2026

Semiconductor device package assemblies having a pre-applied thermally conductive adhesive

Inventors: Seungwon Im (Seoul, KR); Jeungdae Kim (Gimpo, KR); Oseob Jeon (Seoul, KR); Byoungok Lee (Yeonsu-gu, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H10W40/255H10W40/70H10W70/411H10W74/01H10W74/111H10W90/736
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Quick Facts
Patent No.
US 12,642,090
App. No.
18/054,229
Granted
May 26, 2026
Kind
B2
Abstract

In a general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface; a semiconductor die coupled with the first surface of the die attach paddle, and a direct-bonded-metal (DBM) substrate The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface, a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle, a second metal layer disposed on the second surface of the ceramic layer, and a thermally conductive adhesive disposed on the second metal layer, At least a surface of the thermally conductive adhesive can be exposed external to the device package. The thermally conductive adhesive can be configured for coupling the device package with a thermal dissipation appliance.

Claims (33)

1 . A semiconductor device package comprising:

a direct-bonded-metal (DBM) substrate including a ceramic layer interposed between a first metal layer and a second metal layer;

a semiconductor die coupled to the first metal layer via a die attach paddle;

a molding compound partially encapsulating the DBM substrate such that the second metal layer is exposed through an opening in the molding compound, the second metal layer being recessed in the opening of the molding compound; and

a thermally conductive adhesive disposed on the second metal layer in the opening, at least a surface of the thermally conductive adhesive being exposed external to the semiconductor device package wherein the second metal layer includes a recess, a portion of the thermally conductive adhesive being disposed in the recess.

2 . The semiconductor device package of claim 1 , wherein the thermally conductive adhesive is electrically conductive.

3 . The semiconductor device package of claim 1 , wherein:

the second metal layer includes a notch disposed at a perimeter edge of the second metal layer; and

a portion of the thermally conductive adhesive is disposed in the notch.

4 . The semiconductor device package of claim 1 , wherein the surface of the thermally conductive adhesive is coplanar with a surface of the molding compound.

5 . The semiconductor device package of claim 1 , wherein the surface of the thermally conductive adhesive is non-coplanar with the surface of the molding compound.

6 . The semiconductor device package of claim 1 , wherein:

the first metal layer includes an etched pattern disposed around at least a portion of a perimeter of the first metal layer, and

the etched pattern is defined by removing a portion of the first metal layer.

7 . The semiconductor device package of claim 1 , wherein the thermally conductive adhesive is applied and cured prior to coupling the semiconductor device package with an external apparatus.

8 . The semiconductor device package of claim 1 , wherein the die attach paddle is included in a leadframe.

9 . A semiconductor device package comprising:

a direct-bonded-metal (DBM) substrate including a ceramic layer interposed between a first metal layer and a second metal layer; and

a semiconductor die coupled to the first metal layer via a die attach paddle, the first metal layer including an etched pattern disposed around at least a portion of a perimeter of the first metal layer forming a non-etched central planar portion.

10 . The semiconductor device package of claim 9 , wherein the etched pattern includes a plurality of posts defined from the first metal layer.

11 . The semiconductor device package of claim 9 , wherein the etched pattern includes a plurality of recesses defined in the first metal layer.

12 . The semiconductor device package of claim 9 , wherein a removed portion of the first metal layer exposes a corresponding portion of the ceramic layer.

13 . The semiconductor device package of claim 9 , wherein the etched pattern extends around an entire perimeter of the first metal layer.

14 . The semiconductor device package of claim 9 , further comprising a thermally conductive adhesive layer disposed on the second metal layer and exposed external to the semiconductor device package, wherein the thermally conductive adhesive layer is cured without coupling the semiconductor device package to an external apparatus.

15 . The semiconductor device package of claim 9 , further comprising a molding compound partially encapsulating the DBM substrate, such that the second metal layer is exposed through an opening in the molding compound, the second metal layer being recessed in the opening of the molding compound.

16 . The semiconductor device package of claim 9 , wherein the die attach paddle is included in a leadframe.

17 . A method for producing a semiconductor device package, the method comprising:

coupling a semiconductor die to a direct-bonded-metal (DBM) substrate via a die attach paddle, the DBM substrate including a ceramic layer interposed between a first metal layer and a second metal layer, the semiconductor die being attached to the first metal layer;

partially encapsulating the DBM substrate in a molding compound such that the second metal layer is exposed through an opening in the molding compound, the second metal layer being recessed in the opening of the molding compound; and

forming a thermally conductive adhesive layer on the second metal layer such that a surface of the thermally conductive adhesive layer is exposed external to the semiconductor device package, wherein a portion of the thermally conductive adhesive layer is formed in a recess defined in the second metal layer.

18 . The method of claim 17 , wherein the surface of the thermally conductive adhesive layer is coplanar with a surface of the molding compound.

19 . The method of claim 17 , wherein the surface of the thermally conductive adhesive layer is non-coplanar with the surface of the molding compound.

20 . The method of claim 17 , wherein the thermally conductive adhesive layer is applied and cured prior to coupling the semiconductor device package with an external apparatus.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 062882, FRAME 0265 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0423 →
SECURITY INTEREST Recorded Feb 24, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 062882/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2022
From: IM, SEUNGWON; KIM, JEUNGDAE; JEON, OSEOB; LEE, BYOUNGOK
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 061717/0623 →
Continuity (1)
Related Publication 20240162110A1 · May 16, 2024
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