Sintered body, substrate, circuit board, and manufacturing method of sintered boy
A sintered body includes a crystal grain containing silicon nitride, and a grain boundary phase. If dielectric losses of the sintered body are measured while applying an alternating voltage to the sintered body and continuously changing a frequency of the alternating voltage from 50 Hz to 1 MHz, an average value ε A of dielectric losses of the sintered body in a frequency band from 800 kHz to 1 MHz and an average value ε B of dielectric losses of the sintered body in a frequency band from 100 Hz to 200 Hz satisfy an expression |ε A −ε B |≤0.1.
1. A substrate comprising a sintered body,
the sintered body having:
a crystal grain containing silicon nitride; and
a grain boundary phase,
wherein,
a thickness of the substrate is 0.4 mm or less,
a three-point bending strength of the substrate is 600 MPa or more,
the grain boundary phase includes glass compound phases provided in a region with a unit area of 100 μm×100 μm at a cross-section of the sintered body and having different compositions,
at least one of Raman spectra of the glass compound phases has:
a first peak in a Raman shift range from 440 cm-1 to 530 cm-1; and
a second peak in a Raman shift range from 990 cm-1 to 1060 cm-1,
when dielectric losses of the sintered body are measured while applying an alternating voltage to the sintered body and continuously changing a frequency of the alternating voltage from 50 Hz to 1 MHz, an average value εA of dielectric losses of the sintered body in a frequency band from 800 kHz to 1 MHz and an average value εB of dielectric losses of the sintered body in a frequency band from 100 Hz to 200 Hz satisfy an expression |εA−εB|≤0.1.
2. The substrate according to claim 1 , wherein
each of the average value εA and the average value εB is 0.1 or less.
3. The substrate according to claim 1 , wherein
a ratio of a first largest area SM 1 to a second largest area SM 2 of areas of the Raman spectra of the glass compound phases is 1.1 or more and 3.0 or less.
4. The substrate according to claim 1 , wherein
the grain boundary phase contains fluorine.
5. The substrate according to claim 1 , wherein
a ratio of a first largest area SM 1 to a second largest area SM 2 of areas of the Raman spectra of the glass compound phases is 1.1 or more and 3.0 or less, and
the grain boundary phase contains fluorine.
6. The substrate according to claim 1 , wherein
thermal conductivity of the sintered body is 50 W/m·K or more.
7. A circuit board comprising:
the substrate according to claim 1 ; and
a metal plate bonded to the substrate.
8. A method of manufacturing a substrate according to claim 1 , comprising:
mixing silicon nitride powder, a surface modification agent, a polymer binder, and an organic compound in a solvent to form a mixed solution, the polymer binder having a first functional group and a first mean molecular weight, the organic compound having a second functional group as same as the first functional group and a second mean molecular weight smaller than the first mean molecular weight;
adding sintering aid powder into the mixed solution to form a raw material solution;
defoaming the raw material solution to form a raw material slurry;
molding the raw material slurry to form a sheet;
heating the sheet at a temperature of 1000° C. or less to form a degreased body; and
sintering the degreased body at a temperature of 1600° C. or more and 2000° C. or less, wherein,
the polymer binder is an acrylic resin, and
the organic compound has a carboxyl group.
9. The method according to claim 8 , wherein
the organic compound is configured to react with the surface modification agent at a temperature less than or equal to a thermal decomposition temperature of the polymer binder.
10. The method according to claim 8 , wherein
the surface modification agent is a silane coupling agent.