IP Library Granted Patent US 11,844,220
Granted Patent B2
US 11,844,220 · App. 18/074,055 · Granted Dec 12, 2023

Integrated assemblies and methods of forming integrated assemblies

Inventors: Yiping Wang (Boise, ID); Andrew Li (Boise, ID); Haoyu Li (Boise, ID); Matthew J. King (Boise, ID); Wei Yeeng Ng (Boise, ID); Yongjun Jeff Hu (Boise, ID)
Assignee: Micron Technology, Inc.
H10B43/27H01L21/283H01L21/30608H10B41/27H10B41/35H10B43/35
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Quick Facts
Patent No.
US 11,844,220
App. No.
18/074,055
Granted
Dec 12, 2023
Kind
B2
Abstract

Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 10 18 atoms/cm 3 to about 10 21 atoms/cm 3 . The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.

Claims (23)

1. A method of forming an integrated assembly, comprising:

forming a source structure comprising semiconductor material over metal-containing material; additive being within a region of the semiconductor material to a concentration within a range of from 10 18 atoms/cm 3 to 10 21 atoms/cm 3 ; the additive comprising one or more of the group of carbon, oxygen, nitrogen and sulfur;

etching into the region of the semiconductor material utilizing an etchant comprising phosphoric acid; the etching forming an opening which extends into, but not entirely through, the semiconductor material of said region; and

forming a second structure over the source structure and extending into said opening.

2. The method of claim 1 wherein the additive includes the carbon.

3. The method of claim 1 wherein the additive includes the nitrogen.

4. The method of claim 1 wherein the additive includes the oxygen.

5. The method of claim 1 wherein the additive includes the sulfur.

6. The method of claim 1 wherein the second structure comprises insulative material.

7. The method of claim 1 wherein the semiconductor material comprises n-type silicon having n-type dopant therein to a concentration of at least 10 20 atoms/cm 3 .

8. The method of claim 1 wherein the semiconductor material comprises p-type silicon having p-type dopant therein to a concentration of at least 10 20 atoms/cm 3 .

9. A method of forming an integrated assembly, comprising:

forming a stack of alternating first and second levels over a source structure; the first levels comprising sacrificial material and the second levels comprising a first insulative material; the source structure comprising semiconductor material over metal-containing material;

forming a trench which extends through the stack and to a region of the semiconductor material;

providing carbon within the region of the semiconductor material;

removing the sacrificial material of the first levels to leave voids;

forming conductive material within the voids; and

after forming the conductive material, forming a panel within the trench; the panel comprising a second insulative material.

10. The method of claim 9 wherein the carbon is provided to a concentration within a range of from 10 18 atoms/cm 3 to 10 21 atoms/cm 3 .

11. The method of claim 9 wherein the carbon is provided within the region prior to forming the trench.

12. The method of claim 9 wherein the panel consists essentially of the second insulative material.

13. The method of claim 9 wherein the panel separates a first block region of a memory arrangement from a second block region of the memory arrangement.

14. The method of claim 13 wherein the first and second block regions include memory cells, with the individual memory cells including charge-trapping material adjacent channel material; and wherein the channel material is electrically coupled with the source structure.

Continuity (2)
Division 15931421 · May 13, 2020
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