IP Library › Granted Patent US 12,326,747
Granted Patent B1
US 12,326,747 · App. 18/082,720 · Granted Jun 10, 2025

Dual-mode low dropout regulator with fast transient switching between modes

Inventors: Yashu Anand Varshney (Bangalore, IN); Sumilak Chaudhury (Kolkata, IN)
Assignee: Cadence Design Systems, Inc.
G05F1/563G05F1/575
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Quick Facts
Patent No.
US 12,326,747
App. No.
18/082,720
Granted
Jun 10, 2025
Kind
B1
Abstract

The present disclosure relates to a dual mode, low dropout regulator circuit and method of using the same. The circuit may include a multiplexer configured to switch between a high-speed mode and a low-power mode and an error amplifier configured to generate an amplifier output. The circuit may include a class AB circuit configured to receive the amplifier output and generate a class AB output and a unity feedback circuit in electrical communication with the class AB circuit, wherein a single reference voltage is applied to perform a dual mode operation.

Claims (28)

1. A dual mode, low dropout regulator circuit comprising:

a multiplexer configured to switch between a high-speed mode and a low-power mode;

an error amplifier configured to generate an amplifier output;

a class AB circuit configured to receive the amplifier output and generate a class AB output;

a unity feedback circuit in electrical communication with the class AB circuit, wherein a single reference voltage is applied to perform a dual mode operation, wherein the unity feedback circuit and the class AB circuit electrically communicate with the multiplexer to switch between the high-speed mode and the low-power mode.

2. The dual mode, low dropout regulator circuit of claim 1 , wherein the low dropout regulator generates a first power supply in the low-power mode.

3. The dual mode, low dropout regulator circuit of claim 2 , wherein the low dropout regulator generates a second power supply in a high speed mode.

4. The dual mode, low dropout regulator circuit of claim 1 , wherein the low dropout regulator is included in a display PHY (D-PHY) architecture.

5. The dual mode, low dropout regulator circuit of claim 3 , wherein the second power supply is provided to a pre-driver circuit.

6. The dual mode, low dropout regulator circuit of claim 5 , wherein the pre-driver circuit is a thin oxide device.

7. The dual mode, low dropout regulator circuit of claim 1 , wherein the unity feedback circuit includes at least one capacitor operatively connected to a plurality of resistors arranged in parallel.

8. The dual mode, low dropout regulator circuit of claim 1 , further comprising:

a controller configured to provide a toggle signal to the multiplexer.

9. The dual mode, low dropout regulator circuit of claim 3 , wherein the first power supply is approximately 1.2 volts and the second power supply is approximately 0.9 volts.

10. A method of low dropout regulator mode switching, comprising:

applying a single reference voltage at a unity feedback circuit in electrical communication with a class AB circuit to enable a dual mode operation;

switching, using a multiplexer, between a high-speed mode and a low-power mode;

generating an amplifier output using an error amplifier; and

receiving the amplifier output at the class AB circuit and generating a class AB output, wherein the unity feedback circuit and the class AB circuit electrically communicate with the multiplexer to switch between the high-speed mode and the low-power mode.

11. The method of claim 10 , wherein the low dropout regulator generates a first power supply in the low-power mode.

12. The method of claim 11 , wherein the low dropout regulator generates a second power supply in the high-speed mode.

13. The method of claim 10 , wherein the low dropout regulator is included in a display PHY (D-PHY) architecture.

14. The method of claim 12 , wherein the second power supply is provided to a pre-driver circuit.

15. The method of claim 14 , wherein the pre-driver circuit is a thin oxide device.

16. The method of claim 10 , wherein the unity feedback circuit includes at least one capacitor operatively connected to a plurality of resistors arranged in parallel.

17. The method of claim 10 , further comprising:

a controller configured to provide a toggle signal to the multiplexer.

18. The method of claim 12 , wherein the first power supply is approximately 1.2 volts and the second power supply is approximately 0.9 volts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2022
From: VARSHNEY, YASHU ANAND; CHAUDHARY, SUMILAK
To: CADENCE DESIGN SYSTEMS, INC.
Reel/Frame 062125/0335 →
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