IP Library Granted Patent US 12,388,700
Granted Patent B2
US 12,388,700 · App. 18/082,842 · Granted Aug 12, 2025

Circuit for correcting amplitude imbalance and phase imbalance

Inventors: Morteza Abbasi (Carlsbad, CA); Arjun Kamath (San Diego, CA); Tumay Kanar (Carlsbad, CA)
Assignee: Renesas Electronics America Inc.
H04L27/364H04L27/3411H04L2027/0016
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Quick Facts
Patent No.
US 12,388,700
App. No.
18/082,842
Granted
Aug 12, 2025
Kind
B2
Abstract

A correction circuit for correcting an amplitude imbalance and a phase imbalance between an in-phase signal and a quadrature signal, the correction circuit comprising a plurality of variable gain circuits configured to provide in-phase and quadrature signals having balanced amplitudes and balanced phases, wherein each variable gain circuit is configured to apply a gain to amplify, attenuate or to pass a signal.

Claims (680)

1. A correction circuit for correcting an amplitude imbalance and a phase imbalance between an in-phase signal and a quadrature signal, the correction circuit comprising:

a plurality of variable gain circuits configured to provide in-phase and quadrature signals having balanced amplitudes and balanced phases, wherein:

each variable gain circuit is configured to apply a gain to amplify, attenuate or to pass a signal, and

the gain for each variable gain circuit is approximately equal to:

cos

(

θ

/

2

)

cos

2

(

θ

/

2

)

-

sin

2

(

θ

/

2

)

 and/or;

sin

(

θ

/

2

)

α

(

cos

2

(

θ

/

2

)

-

sin

2

(

θ

/

2

)

)

 and/or;

sin

(

θ

/

2

)

cos

2

(

θ

/

2

)

-

sin

2

(

θ

/

2

)

 and/or;

cos

(

θ

/

2

)

α

(

cos

2

(

θ

/

2

)

-

sin

2

(

θ

/

2

)

)

,

the phase imbalance parameter θ being the phase difference Δθ between the in-phase signal and the quadrature signal minus 90°; and

the amplitude imbalance parameter α being the peak amplitude of the in-phase signal or the peak amplitude of the quadrature signal, divided by the other of the peak amplitude of the in-phase signal and the peak amplitude of the quadrature signal.

2. The correction circuit of claim 1 configured to:

receive a first in-phase signal and a first quadrature signal;

provide a second in-phase signal and a second quadrature signal; wherein:

there is an amplitude imbalance and a phase imbalance between the first in-phase signal and the first quadrature signal; and

the amplitudes and phases of the second in-phase signal and the second quadrature signal are balanced.

3. The correction circuit of claim 2 , wherein the plurality of variable gain circuits comprises:

a first variable gain circuit configured to apply a first gain;

a second variable gain circuit configured to apply a second gain;

a third variable gain circuit configured to apply a third gain; and

a fourth variable gain circuit configured to apply a fourth gain.

4. The correction circuit of claim 3 , comprising:

a first input node for receiving the first in-phase signal;

a second input node for receiving the first quadrature signal;

a first output node for providing the second in-phase signal; and

a second output node for providing the second quadrature signal.

5. The correction circuit of claim 4 , wherein:

the first variable gain circuit comprises:

i) a first input terminal coupled to the first input node; and

ii) a first output terminal coupled to the first output node;

the second variable gain circuit comprises:

i) a second input terminal coupled to the second input node; and

ii) a second output terminal coupled to the first output node;

the third variable gain circuit comprises:

i) a third input terminal coupled to the first input node; and

ii) a third output terminal coupled to the second output node; and

the fourth variable gain circuit comprises:

i) a fourth input terminal coupled to the second input node; and

ii) a fourth output terminal coupled to the second output node.

6. The correction circuit of claim 5 , wherein:

the first gain is approximately equal to

cos

(

θ

2

)

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

 and/or;

the second gain is approximately equal to

sin

(

θ

2

)

α

(

cos

2

(

θ

2

)

-

sin

(

θ

2

)

)

 and/or;

the third gain is approximately equal to

sin

(

θ

2

)

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

the fourth gain is approximately equal to

cos

(

θ

2

)

α

(

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

)

.

7. The correction circuit of claim 1 , wherein the plurality of variable gain circuits are configured to apply a phase rotation to the in-phase and quadrature signals.

8. The correction circuit of claim 7 configured to:

receive a first in-phase signal and a first quadrature signal; and

provide a second in-phase signal and a second quadrature signal,

wherein:

there is an amplitude imbalance and a phase imbalance between the first in-phase signal and the first quadrature signal; and

the amplitudes and phases of the second in-phase signal and the second quadrature signal are balanced and have a phase rotation.

9. The correction circuit of claim 8 , wherein the plurality of variable gain circuits comprises:

a first variable gain circuit configured to apply a first gain;

a second variable gain circuit configured to apply a second gain;

a third variable gain circuit configured to apply a third gain; and

a fourth variable gain circuit configured to apply a fourth gain.

10. The correction circuit of claim 9 , comprising:

a first input node for receiving the first in-phase signal;

a second input node for receiving the first quadrature signal;

a first output node for providing the second in-phase signal; and

a second output node for providing the second quadrature signal.

11. The correction circuit of claim 10 , wherein:

the first variable gain circuit comprises:

i) a first input terminal coupled to the first input node; and

ii) a first output terminal coupled to the first output node;

the second variable gain circuit comprises:

i) a second input terminal coupled to the second input node; and

ii) a second output terminal coupled to the first output node;

the third variable gain circuit comprises:

i) a third input terminal coupled to the first input node; and

ii) a third output terminal coupled to the second output node; and

the fourth variable gain circuit comprises:

i) a fourth input terminal coupled to the second input node; and

ii) a fourth output terminal coupled to the second output node.

12. The correction circuit of claim 11 , wherein the first, second, third and fourth gains are each dependent on:

a phase rotation parameter ϕ; and

one or both of:

i) the phase imbalance parameter θ; and

ii) the amplitude imbalance parameter α.

13. The correction circuit of claim 12 , wherein:

the first gain is approximately equal to

cos

(

θ

/

2

-

ϕ

)

cos

(

θ

/

2

-

ϕ

)

cos

(

θ

/

2

+

ϕ

)

-

sin

(

θ

/

2

-

ϕ

)

sin

(

θ

/

2

+

ϕ

)

 and/or;

the second gain is approximately equal to

sin

(

θ

/

2

+

ϕ

)

α

(

cos

(

θ

/

2

-

ϕ

)

cos

(

θ

/

2

+

ϕ

)

-

sin

(

θ

/

2

-

ϕ

)

sin

(

θ

/

2

+

ϕ

)

)

 and/or;

the third gain is approximately equal to

cos

(

θ

/

2

+

ϕ

)

α

(

cos

(

θ

/

2

-

ϕ

)

cos

(

θ

/

2

+

ϕ

)

-

sin

(

θ

/

2

-

ϕ

)

sin

(

θ

/

2

+

ϕ

)

)

.

 and/or;

the fourth gain is approximately equal to

sin

(

θ

/

2

-

ϕ

)

cos

(

θ

/

2

-

ϕ

)

cos

(

θ

/

2

+

ϕ

)

-

sin

(

θ

/

2

-

ϕ

)

sin

(

θ

/

2

+

ϕ

)

.

14. The correction circuit of claim 1 , comprising calibration circuitry configured to undertake a calibration process comprising:

detecting amplitude and phase imbalances;

determining the gain of each of the plurality of variable gain circuits required to provide in-phase and quadrature signals having balanced amplitudes and phases; and

adjusting the gain of each of the plurality of variable gain circuits, based on the determining, such that the gains of the variable gain circuits are suitable to provide in-phase and quadrature signals having balanced amplitudes and phases.

15. The correction circuit of claim 14 configured to:

receive a first in-phase signal and a first quadrature signal;

provide a second in-phase signal and a second quadrature signal; wherein:

there is an amplitude imbalance and a phase imbalance between the first in-phase signal and the first quadrature signal; and

the amplitudes and phases of the second in-phase signal and the second quadrature signal are balanced.

16. The correction circuit of claim 15 , wherein the plurality of variable gain circuits comprises:

a first variable gain circuit configured to apply a first gain;

a second variable gain circuit configured to apply a second gain;

a third variable gain circuit configured to apply a third gain; and

a fourth variable gain circuit configured to apply a fourth gain.

17. The correction circuit of claim 16 , comprising:

a first input node for receiving the first in-phase signal;

a second input node for receiving the first quadrature signal;

a first output node for providing the second in-phase signal; and

a second output node for providing the second quadrature signal.

18. An apparatus comprising a first transceiver system comprising a first correction circuit for correcting an amplitude imbalance and a phase imbalance between an in-phase signal and a quadrature signal in the first transceiver system, the first correction circuit comprising:

a plurality of first variable gain circuits configured to provide in-phase and quadrature signals having balanced amplitudes and balanced phases;

wherein:

each first variable gain circuit is configured to apply a gain to amplify, attenuate or to pass a signal, and

the gain for each variable gain circuit is approximately equal to:

cos

(

θ

2

)

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

 and/or;

sin

(

θ

2

)

α

(

cos

2

(

θ

2

)

-

sin

(

θ

2

)

)

 and/or;

sin

(

θ

2

)

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

 and/or;

cos

(

θ

2

)

α

(

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

)

.

the phase imbalance parameter θ being the phase difference Δθ between the in-phase signal and the quadrature signal minus 90°; and

the amplitude imbalance parameter α being the peak amplitude of the in-phase signal or the peak amplitude of the quadrature signal, divided by the other of the peak amplitude of the in-phase signal and the peak amplitude of the quadrature signal.

19. A method of correcting an amplitude imbalance and a phase imbalance between an in-phase signal and a quadrature signal using a correction circuit comprising a plurality of variable gain circuits, each variable gain circuit being configured to apply a gain to amplify, attenuate or to pass a signal,

wherein:

the gain for each variable gain circuit is approximately equal to:

cos

(

θ

2

)

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

 and/or;

sin

(

θ

2

)

a

(

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

)

 and/or;

sin

(

θ

2

)

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

 and/or;

cos

(

θ

2

)

a

(

cos

2

(

θ

2

)

-

sin

2

(

θ

2

)

)

2

the phase imbalance parameter θ being the phase difference Δθ between the in-phase signal and the quadrature signal minus 90°; and

the amplitude imbalance parameter α being the peak amplitude of the in-phase signal or the peak amplitude of the quadrature signal, divided by the other of the peak amplitude of the in-phase signal and the peak amplitude of the quadrature signal;

wherein the method comprising:

providing in-phase and quadrature signals having balanced amplitudes and balanced phases using the plurality of variable gain circuits.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2025
From: RENESAS ELECTRONICS AMERICA INC.
To: AXIRO SEMICONDUCTOR INC.
Reel/Frame 070864/0142 →
MERGER Recorded Apr 15, 2025
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: RENESAS ELECTRONICS AMERICA INC.
Reel/Frame 070851/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2022
From: ABBASI, MORTEZA; KAMATH, ARJUN; KANAR, TUMAY
To: RENESAS ELECTRONICS AMERICA INC.
Reel/Frame 062126/0497 →
Continuity (1)
Related Publication 20240205067A1 · Jun 20, 2024
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