IP Library › Granted Patent US 12,191,876
Granted Patent B2
US 12,191,876 · App. 18/088,982 · Granted Jan 7, 2025

Gain calibration with quantizer offset settings

Inventors: Bob Verbruggen (Dublin, IE); Christophe Erdmann (Nice, FR)
Assignee: Xilinx, Inc.
H03M1/1014
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Quick Facts
Patent No.
US 12,191,876
App. No.
18/088,982
Granted
Jan 7, 2025
Kind
B2
Abstract

Methods and apparatus for calibrating a gain for a circuit block are disclosed. An example method includes receiving a plurality of quantizer offsets, where the plurality of quantizer offsets represent calibration data for a quantizer configured to quantize an output of the circuit block, determining one or more differences based on one or more first quantizer offsets of the plurality of quantizer offsets and on one or more second quantizer offsets of the plurality of quantizer offsets, and determining an incremental change in a gain associated with the circuit block based on the one or more differences.

Claims (29)

1. A method for calibrating a gain for a circuit block, comprising:

receiving a plurality of quantizer offsets, the plurality of quantizer offsets representing calibration data for a quantizer configured to quantize an output of the circuit block;

determining one or more differences based on one or more first quantizer offsets of the plurality of quantizer offsets and on one or more second quantizer offsets of the plurality of quantizer offsets;

determining an incremental change in the gain based at least in part on the one or more differences.

2. The method of claim 1 , wherein the one or more differences comprise a first difference based at least in part on a first quantizer offset corresponding to one of N most positive quantized values of the circuit block output and a second quantizer offset corresponding to one of N most negative quantized values of the circuit block output.

3. The method of claim 2 , wherein the first quantizer offset comprises a maximum offset corresponding to one of the N most positive quantized values and wherein the second quantizer offset comprises a minimum offset corresponding to one of the N most negative quantized values.

4. The method of claim 3 , wherein determining the incremental change in the gain comprises decrementing the gain in response to the first difference exceeding a threshold difference.

5. The method of claim 3 , wherein the one or more differences further comprise a second difference based at least in part on a third quantizer offset corresponding to one of the N most positive quantized values and a fourth quantizer offset corresponding to one of the N most negative quantized values.

6. The method of claim 5 , wherein determining the incremental change in the gain comprises incrementing the gain in response to the second difference exceeding a threshold difference.

7. The method of claim 5 , further comprising making no change in the gain in response to the first difference exceeding a threshold difference and the second difference exceeding the threshold difference.

8. The method of claim 2 , wherein the first quantizer offset comprises a first average of quantizer offsets corresponding to the N most positive quantized values and wherein the second quantizer offset comprises a second average of quantizer offsets corresponding to the N most negative quantized values.

9. The method of claim 8 , wherein determining the incremental change in the gain comprises decrementing the gain in response to the first average exceeding the second average by at least a threshold difference.

10. The method of claim 8 , wherein determining the incremental change in the gain comprises incrementing the gain in response to the second average exceeding the first average by at least a threshold difference.

11. A gain calibration apparatus for a circuit block, comprising:

a first plurality of terminals to receive a plurality of quantizer offsets, the plurality of quantizer offsets representing calibration data for a quantizer configured to quantize an output of the circuit block;

difference calculation logic configured to determine one or more differences based on one or more first quantizer offsets of the plurality of quantizer offsets and on one or more second quantizer offsets of the plurality of quantizer offsets; and

gain calibration logic configured to determine an incremental change in a gain of the circuit block based at least in part on the one or more differences.

12. The gain calibration apparatus of claim 11 , wherein the one or more differences comprise a first difference based at least in part on a first quantizer offset corresponding to one of N most positive quantized values of the circuit block output and a second quantizer offset corresponding to one of N most negative quantized values of the circuit block output.

13. The gain calibration apparatus of claim 12 , wherein the first quantizer offset comprises a maximum offset corresponding to one of the N most positive quantized values and wherein the second quantizer offset comprises a minimum offset corresponding to one of the N most negative quantized values.

14. The gain calibration apparatus of claim 13 , wherein the gain calibration logic is configured to decrement the gain in response to the first difference exceeding a threshold difference.

15. The gain calibration apparatus of claim 13 , wherein the one or more differences further comprise a second difference based at least in part on a third quantizer offset corresponding to one of the N most positive quantized values and a fourth quantizer offset corresponding to one of the N most negative quantized values.

16. The gain calibration apparatus of claim 15 , wherein the gain calibration logic is configured to increment the gain in response to the second difference exceeding a threshold difference.

17. The gain calibration apparatus of claim 12 , wherein the first quantizer offset comprises a first average of quantizer offsets corresponding to the N most positive quantized values and wherein the second quantizer offset comprises a second average of quantizer offsets corresponding to the N most negative quantized values.

18. The gain calibration apparatus of claim 17 , wherein the gain calibration logic is configured to decrement the gain in response to the first average exceeding the second average by at least a threshold difference.

19. The gain calibration apparatus of claim 17 , wherein the gain calibration logic is configured to increment the gain in response to the second average exceeding the first average by at least a threshold difference.

20. A non-transitory computer readable storage medium storing instructions that, when executed by one or more processors of a gain calibration apparatus, cause the gain calibration apparatus to perform operations comprising:

receiving a plurality of quantizer offsets, the plurality of quantizer offsets representing calibration data for a quantizer configured to quantize a circuit block output;

determining one or more differences based on one or more first quantizer offsets of the plurality of quantizer offsets and on one or more second quantizer offsets of the plurality of quantizer offsets;

determining an incremental change in a gain of the circuit block based at least in part on the one or more differences.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2022
From: VERBRUGGEN, BOB; ERDMANN, CHRISTOPHE
To: XILINX, INC.
Reel/Frame 062209/0280 →
Continuity (1)
Related Publication 20240213995A1 · Jun 27, 2024
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