Method of manufacturing a printed circuit board with a self-aligned setback

1. A method, comprising:

providing a multilayer printed circuit board (PCB) comprising one or more conductive features each arranged on one or more conductive layers of the multilayer PCB such that each of the one or more conductive features forms a winding around a predetermined axis;

forming a hole in the multilayer PCB at the axis of the winding formed from each of the one or more conductive features to accommodate a core leg, wherein for each hole, an inner circumferential edge of a respective one of the one or more conductive features overlap an edge of the hole in a lateral direction after the hole is formed; and

for each hole, etching the multilayer PCB after forming the hole to create a setback between the inner circumferential edge of the respective one of the one or more conductive features and the hole, the setback being created by etching from within the hole radially outward along the inner circumferential edge to remove a setback portion of the respective one of the one or more conductive features.

2. The method of claim 1 , wherein:

at least one of the one or more conductive features is located on an inner layer of the multilayer PCB between a top layer and a bottom layer of the multilayer PCB.

3. The method of claim 1 , wherein:

at least one of the one or more conductive features is located on a top layer or bottom layer of the multilayer PCB;

the method further comprising:

covering an exterior surface of the at least one of the one or more conductive features to restrict the etching to acting on the at least one of the one or more conductive features from within the respective hole radially outward along the inner circumferential edge.

4. The method of claim 1 , wherein:

the one or more conductive features include:

at least one inner conductive feature arranged on an inner conductive layer of the multilayer PCB; and

at least one outer conductive feature arranged on an outer conductive layer of the multilayer PCB;

the method further comprising:

covering an exterior surface of the at least one outer conductive feature to restrict the etching to acting on the at least one outer conductive feature from within the respective hole radially outward along the inner circumferential edge.

5. The method of claim 1 , further comprising:

providing the core legs;

coating the core legs with an electrically insulating material; and

inserting each core leg into one of the respective holes.

6. The method of claim 1 , wherein:

for each hole, the one or more conductive features include:

at least one respective inner conductive feature arranged on an inner conductive layer of the multilayer PCB; and

at least one respective outer conductive feature arranged on an outer conductive layer of the multilayer PCB;

the method further comprising:

forming a second setback between the at least one respective outer conductive feature and the respective hole by leaving a portion of an exterior surface of the at least one respective outer conductive feature uncovered during the etching.

7. The method of claim 1 , further comprising:

assembling a magnetically permeable core comprising the one or more core legs, each of the one or more core legs extending into a respective hole at each of the one or more predetermined axes.

8. The method of claim 1 , further comprising:

forming each hole through the multilayer PCB to remove portions of the one or more conductive features from a center of each hole to the inner circumferential edge of each of the one or more conductive features.

9. The method of claim 1 , further comprising:

forming the setback by leaving a portion of an exterior surface of each of the one or more conductive features uncovered during the etching.

10. The method of claim 1 , further comprising:

covering an exterior surface of each of the one or more conductive features to restrict the etching to a portion of the exterior surface from within the hole radially outward along the inner circumferential edge.

11. The method of claim 1 , further comprising:

identifying areas on the multi-layer PCB to form the holes through layers of the multi-layer PCB;

forming the one or more conductive turns on the layers of the multi-layer PCB at respective areas, each of the one or more conductive turns including (i) an outer circumference around a respective area and (ii) a conductive portion extending from the outer circumference into the respective area; and

forming a respective hole at each of the identified areas after forming the one or more conductive turns.

12. The method of claim 11 , further comprising:

stacking the layers of the multi-layer PCB to align the one or more conductive turns with each other, each of the layers of the multi-layer PCB separated from each other by at least one intervening insulation layer.