Electrostatic discharge protection device
An electrostatic discharge protection device is formed using only electrically connected transistors. The transistors include: a first MOS-type transistor forming a clamping circuit coupled between first and second supply nodes; a second MOS-type transistor coupled between the first supply node and a gate terminal of the first MOS-type transistor; and a third MOS-type transistor having a first gate terminal coupled to a gate terminal of the second MOS-type transistor, a second gate terminal coupled to one of the first and second supply nodes, and first and second conduction terminals coupled to the second supply node.
1 . An electrostatic discharge protection device, comprising a clamping circuit formed only of electrically connected transistors including:
a first MOS-type transistor having a first conduction terminal coupled to a first supply node, and a second conduction terminal coupled to a second supply node;
a second MOS-type transistor having a first conduction terminal coupled to the first supply node, and a second conduction terminal coupled to a gate terminal of said first MOS-type transistor; and
a third MOS-type transistor having first and second conduction terminals coupled to the second supply node, a first gate terminal coupled to a gate terminal of the second MOS-type transistor, and a second gate terminal coupled to one of the first and second supply nodes.
2 . The device according to claim 1 , wherein a body contact terminal of the third MOS-type transistor is coupled to the second supply node.
3 . The device according to claim 1 , wherein said second gate terminal of the third MOS-type transistor is coupled to the second supply node, and further including: a fourth MOS-type transistor having first and second conduction terminals coupled to the gate terminal of the second MOS-type transistor, and a gate terminal coupled to the first supply node.
4 . The device according to claim 3 , wherein a body contact terminal of the fourth MOS-type transistor is coupled to the gate terminal of the second MOS-type transistor.
5 . The device according to claim 3 , wherein the second, third and fourth MOS-type transistors form a trigger circuit configured to generate a trigger signal applied to the gate terminal of said first MOS-type transistor to control turn on of said first MOS-type transistor, wherein the trigger signal is generated by the trigger circuit in response to an electrostatic discharge event at one or more of the first and second supply nodes.
6 . The device according to claim 3 , wherein the fourth MOS-type transistor comprises an N-type BiMOS transistor.
7 . The device according to claim 1 , wherein said second gate terminal of the second MOS-type transistor is coupled to the first supply node, and further including: a fifth MOS-type transistor having a first conduction terminal and a gate coupled to the gate terminal of the second MOS-type transistor; and a sixth MOS-type transistor having a first conduction terminal and a gate coupled to a second conduction terminal of said fifth MOS-type transistor, and a second conduction terminal coupled to the second supply node.
8 . The device according to claim 7 , wherein body contacts of the first and sixth MOS-type transistors are left floating.
9 . The device according to claim 7 , wherein body contacts of the first and sixth MOS-type transistors are coupled to a reference potential.
10 . The device according to claim 9 , wherein the reference potential is a ground potential.
11 . The device according to claim 7 , wherein each of the fifth and sixth MOS-type transistors is an N-type BiMOS transistor.
12 . The device according to claim 7 , wherein the second, third, fifth and sixth MOS-type transistors form a trigger circuit configured to generate a trigger signal applied to the gate terminal of said first MOS-type transistor to control turn on of said first MOS-type transistor, wherein said trigger signal is generated by the trigger circuit in response to an electrostatic discharge event at one or more of the first and second supply nodes.
13 . The device according to claim 1 , further comprising:
an input/output node;
a first diode effect component coupled between the first supply node and the input/output node; and
a second diode effect component coupled between said input/output node and the second supply node.
14 . The device according to claim 13 :
wherein the first diode effect component comprises a first diode-assembled MOS-type transistor; and
wherein the second diode effect component comprises a second diode-assembled MOS-type transistor.
15 . The device according to claim 14 , wherein each of the first and second diode-assembled MOS-type transistor are implemented as an n-type BiMOS transistor.
16 . The device according to claim 1 , further comprising a coupling circuit configured to couple the second supply node to a further supply node of another electrostatic discharge protection device.
17 . The device according to claim 16 , wherein the coupling circuit comprises:
a third diode-assembled MOS-type transistor and a fourth diode-assembled MOS-type transistor connected head-to-tail between the second supply node and the further supply node.
18 . The device according to claim 1 , wherein the first MOS-type transistor is an n-type BiMOS transistor.