Methods, apparatuses, non-transitory computer-readable storage devices, and systems using fine-grained whole-program pointer layout transforms
View Patent ↗Methods and devices for analyzing and updating intermediate representations containing pointers includes compiling one or more source files into intermediate representations (IRs) having pointers, analyzing the IRs, producing transformed IRs comprising updated pointers, and producing object code from the transformed IRs. The device may include one or more non-transitory computer-readable storage devices having computer-executable instructions, when executed, cause a processing structure to perform the actions described relating to pointers. The analysis and updating of pointers may relate to types of bounds to enhance security of the systems in question by preventing erroneous references to memory space by pointers.
1. A method comprising:
compiling one or more source files into intermediate representations (IRs) having pointers;
analyzing the IRs;
producing transformed IRs comprising updated pointers;
producing object code from the transformed IRs;
determining a subset of the pointers that result in arithmetic and spatial memory errors; and
determining bounds types and changes for pointer types of the subset of the pointers for avoiding the arithmetic and spatial memory errors.
2. The method of claim 1 , wherein the pointers have uncompressed bounds.
3. The method of claim 1 further comprising: for each of the pointers, compiling a point-to graph with features of layout transformation.
4. The method of claim 3 , wherein the point-to graph comprises allocation nodes, object-partition nodes, and pointer-expression nodes.
5. The method of claim 3 , wherein said compiling the point-to graph comprises: compiling dataflow information of the pointers.
6. The method of claim 1 , wherein said analyzing the IRs comprises: analyzing the IRs of all of the one or more source files, or performing static analysis of the IRs for obtaining instrumentation parameters.
7. The method of claim 6 , wherein said analyzing the IRs comprises said performing the static analysis of the IRs for obtaining the instrumentation parameters; and wherein the static analysis comprises: identifying a subset of the pointers requiring extension and determining a required bound type for each pointer.
8. The method of claim 1 , wherein said producing the transformed IRs comprises: changing bounds types of one or more of the pointers.
9. The method of claim 1 , wherein the method is configured for execution by one or more processors compatible with Capability Hardware Enhanced Reduced-Instruction-Set-Computer(RISC) Instructions (CHERI) pointer architecture.
10. One or more processors configured with instructions to perform the method of claim 1 .
11. One or more non-transitory computer-readable storage devices comprising computer-executable instructions, wherein the instructions, when executed, cause a one or more processors to perform actions comprising:
compiling one or more source files into intermediate representations (IRs) having pointers;
analyzing the IRs;
producing transformed IRs comprising updated pointers;
producing object code from the transformed IRs;
determining a subset of the pointers that result in arithmetic and spatial memory errors; and
determining bounds types and changes for pointer types of the subset of the pointers for avoiding the arithmetic and spatial memory errors.
12. The one or more non-transitory computer-readable storage devices of claim 11 , wherein the pointers have uncompressed bounds.
13. The one or more non-transitory computer-readable storage devices of claim 11 , wherein analyzing the IRs comprises:
analyzing the IRs of all of the one or more source files; or
performing static analysis of the IRs for obtaining instrumentation parameters.
14. The one or more non-transitory computer-readable storage devices of claim 13 , wherein the static analysis comprises: identifying a subset of the pointers requiring extension.
15. The one or more non-transitory computer-readable storage devices of claim 14 , wherein identifying the subset of the pointers requiring extension comprises: determining a required bound type for each pointer.
16. The one or more non-transitory computer-readable storage devices of claim 11 , wherein the instructions, when executed, cause the one or more processors to perform further action of compiling a point-to graph for each of the pointers.
17. The one or more non-transitory computer-readable storage devices of claim 16 , wherein the point-to graph comprises allocation nodes, object-partition nodes, and pointer-expression nodes.
18. The one or more non-transitory computer-readable storage devices of claim 11 , wherein said producing the transformed IRs comprises: changing bound types of one or more of the pointers.